1021 	if (!dev->pm_cap)  in pci_raw_set_power_state()
1046 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_raw_set_power_state()
1079 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_raw_set_power_state()
1090 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_raw_set_power_state()
1136 	} else if (dev->pm_cap) {  in pci_update_current_state()
1139 		pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_update_current_state()
1177 	if (error && !dev->pm_cap) /* Fall back to PCI_D0 */  in pci_platform_power_transition()
1377 	if (!dev->pm_cap)  in pci_choose_state()
2223 	if (!dev->pm_cap)  in pci_check_pme_status()
2226 	pmcsr_pos = dev->pm_cap + PCI_PM_CTRL;  in pci_check_pme_status()
2282 	if (!dev->pm_cap)  in pci_pme_capable()
2332 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in __pci_pme_active()
2338 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in __pci_pme_active()
2352 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);  in pci_pme_restore()
2360 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, pmcsr);  in pci_pme_restore()
2575 	if (!dev->pm_cap)  in pci_target_state()
3038 	dev->pm_cap = 0;  in pci_pm_init()
3054 	dev->pm_cap = pm;  in pci_pm_init()
4687 	if (!dev->pm_cap || dev->dev_flags & PCI_DEV_FLAGS_NO_PM_RESET)  in pci_pm_reset()
4690 	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr);  in pci_pm_reset()
4702 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()
4707 	pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);  in pci_pm_reset()