35 static int pci_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)  in pci_msi_setup_msi_irqs()  argument
41 		return msi_domain_alloc_irqs(domain, &dev->dev, nvec);  in pci_msi_setup_msi_irqs()
43 	return arch_setup_msi_irqs(dev, nvec, type);  in pci_msi_setup_msi_irqs()
90 int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)  in arch_setup_msi_irqs()  argument
97 		return chip->setup_irqs(chip, dev, nvec, type);  in arch_setup_msi_irqs()
102 	if (type == PCI_CAP_ID_MSI && nvec > 1)  in arch_setup_msi_irqs()
579 msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd)  in msi_setup_entry()  argument
586 		masks = irq_create_affinity_masks(nvec, affd);  in msi_setup_entry()
589 	entry = alloc_msi_entry(&dev->dev, nvec, masks);  in msi_setup_entry()
605 	entry->msi_attrib.multiple	= ilog2(__roundup_pow_of_two(nvec));  in msi_setup_entry()
647 static int msi_capability_init(struct pci_dev *dev, int nvec,  in msi_capability_init()  argument
656 	entry = msi_setup_entry(dev, nvec, affd);  in msi_capability_init()
667 	ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);  in msi_capability_init()
719 			      struct msix_entry *entries, int nvec,  in msix_setup_entries()  argument
729 		masks = irq_create_affinity_masks(nvec, affd);  in msix_setup_entries()
731 	for (i = 0, curmsk = masks; i < nvec; i++) {  in msix_setup_entries()
807 				int nvec, struct irq_affinity *affd)  in msix_capability_init()  argument
830 	ret = msix_setup_entries(dev, base, entries, nvec, affd);  in msix_capability_init()
834 	ret = pci_msi_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);  in msix_capability_init()
902 static int pci_msi_supported(struct pci_dev *dev, int nvec)  in pci_msi_supported()  argument
918 	if (nvec < 1)  in pci_msi_supported()
1015 			     int nvec, struct irq_affinity *affd, int flags)  in __pci_enable_msix()  argument
1020 	if (!pci_msi_supported(dev, nvec) || dev->current_state != PCI_D0)  in __pci_enable_msix()
1026 	if (nvec > nr_entries && !(flags & PCI_IRQ_VIRTUAL))  in __pci_enable_msix()
1031 		for (i = 0; i < nvec; i++) {  in __pci_enable_msix()
1034 			for (j = i + 1; j < nvec; j++) {  in __pci_enable_msix()
1046 	return msix_capability_init(dev, entries, nvec, affd);  in __pci_enable_msix()
1101 	int nvec;  in __pci_enable_msi_range()  local
1119 	nvec = pci_msi_vec_count(dev);  in __pci_enable_msi_range()
1120 	if (nvec < 0)  in __pci_enable_msi_range()
1121 		return nvec;  in __pci_enable_msi_range()
1122 	if (nvec < minvec)  in __pci_enable_msi_range()
1125 	if (nvec > maxvec)  in __pci_enable_msi_range()
1126 		nvec = maxvec;  in __pci_enable_msi_range()
1130 			nvec = irq_calc_affinity_vectors(minvec, nvec, affd);  in __pci_enable_msi_range()
1131 			if (nvec < minvec)  in __pci_enable_msi_range()
1135 		rc = msi_capability_init(dev, nvec, affd);  in __pci_enable_msi_range()
1137 			return nvec;  in __pci_enable_msi_range()
1144 		nvec = rc;  in __pci_enable_msi_range()
1163 	int rc, nvec = maxvec;  in __pci_enable_msix_range()  local
1173 			nvec = irq_calc_affinity_vectors(minvec, nvec, affd);  in __pci_enable_msix_range()
1174 			if (nvec < minvec)  in __pci_enable_msix_range()
1178 		rc = __pci_enable_msix(dev, entries, nvec, affd, flags);  in __pci_enable_msix_range()
1180 			return nvec;  in __pci_enable_msix_range()
1187 		nvec = rc;  in __pci_enable_msix_range()