Lines Matching refs:mv_pci
83 struct mobiveil_pcie *mv_pci = &pcie->pci; in ls_pcie_g4_disable_interrupt() local
85 mobiveil_csr_writel(mv_pci, 0, PAB_INTP_AMBA_MISC_ENB); in ls_pcie_g4_disable_interrupt()
90 struct mobiveil_pcie *mv_pci = &pcie->pci; in ls_pcie_g4_enable_interrupt() local
94 mobiveil_csr_writel(mv_pci, 0xffffffff, PAB_INTP_AMBA_MISC_STAT); in ls_pcie_g4_enable_interrupt()
98 mobiveil_csr_writel(mv_pci, val, PAB_INTP_AMBA_MISC_ENB); in ls_pcie_g4_enable_interrupt()
103 struct mobiveil_pcie *mv_pci = &pcie->pci; in ls_pcie_g4_reinit_hw() local
104 struct device *dev = &mv_pci->pdev->dev; in ls_pcie_g4_reinit_hw()
112 act_stat = mobiveil_csr_readl(mv_pci, PAB_ACTIVITY_STAT); in ls_pcie_g4_reinit_hw()
132 mobiveil_host_init(mv_pci, true); in ls_pcie_g4_reinit_hw()
135 while (!ls_pcie_g4_link_up(mv_pci) && to--) in ls_pcie_g4_reinit_hw()
148 struct mobiveil_pcie *mv_pci = &pcie->pci; in ls_pcie_g4_isr() local
151 val = mobiveil_csr_readl(mv_pci, PAB_INTP_AMBA_MISC_STAT); in ls_pcie_g4_isr()
160 mobiveil_csr_writel(mv_pci, val, PAB_INTP_AMBA_MISC_STAT); in ls_pcie_g4_isr()
165 static int ls_pcie_g4_interrupt_init(struct mobiveil_pcie *mv_pci) in ls_pcie_g4_interrupt_init() argument
167 struct ls_pcie_g4 *pcie = to_ls_pcie_g4(mv_pci); in ls_pcie_g4_interrupt_init()
168 struct platform_device *pdev = mv_pci->pdev; in ls_pcie_g4_interrupt_init()
191 struct mobiveil_pcie *mv_pci = &pcie->pci; in ls_pcie_g4_reset() local
194 ctrl = mobiveil_csr_readw(mv_pci, PCI_BRIDGE_CONTROL); in ls_pcie_g4_reset()
196 mobiveil_csr_writew(mv_pci, ctrl, PCI_BRIDGE_CONTROL); in ls_pcie_g4_reset()
216 struct mobiveil_pcie *mv_pci; in ls_pcie_g4_probe() local
231 mv_pci = &pcie->pci; in ls_pcie_g4_probe()
233 mv_pci->pdev = pdev; in ls_pcie_g4_probe()
234 mv_pci->ops = &ls_pcie_g4_pab_ops; in ls_pcie_g4_probe()
235 mv_pci->rp.ops = &ls_pcie_g4_rp_ops; in ls_pcie_g4_probe()
236 mv_pci->rp.bridge = bridge; in ls_pcie_g4_probe()
242 ret = mobiveil_pcie_host_probe(mv_pci); in ls_pcie_g4_probe()