Lines Matching +full:bus +full:- +full:range

1 // SPDX-License-Identifier: GPL-2.0+
3 * FDT Address translation based on u-boot fdt_support.c which in turn was
9 * Copyright 2010-2011 Freescale Semiconductor, Inc.
30 while(na--) in of_dump_addr()
38 /* Callbacks for bus specific translators */
42 u64 (*map)(__be32 *addr, const __be32 *range,
47 /* Default translator (generic bus) */
54 prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL); in fdt_bus_default_count_cells()
62 prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); in fdt_bus_default_count_cells()
70 static u64 __init fdt_bus_default_map(__be32 *addr, const __be32 *range, in fdt_bus_default_map() argument
75 cp = of_read_number(range, na); in fdt_bus_default_map()
76 s = of_read_number(range + na + pna, ns); in fdt_bus_default_map()
84 return da - cp; in fdt_bus_default_map()
93 addr[na - 2] = cpu_to_fdt32(a >> 32); in fdt_bus_default_translate()
94 addr[na - 1] = cpu_to_fdt32(a & 0xffffffffu); in fdt_bus_default_translate()
99 /* Array of bus specific translators */
110 const struct of_bus *bus, in fdt_translate_one() argument
134 for (; rlen >= rone; rlen -= rone, ranges += rone) { in fdt_translate_one()
135 offset = bus->map(addr, ranges, na, ns, pna); in fdt_translate_one()
149 /* Translate it into parent bus space */ in fdt_translate_one()
150 return pbus->translate(addr, offset, pna); in fdt_translate_one()
154 * Translate an address from the device-tree into a CPU physical address,
155 * this walks up the tree and applies the various bus mappings on the
158 * Note: We consider that crossing any level with #size-cells == 0 to mean
166 const struct of_bus *bus, *pbus; in fdt_translate_address() local
182 /* Get parent & match bus type */ in fdt_translate_address()
186 bus = &of_busses[0]; in fdt_translate_address()
189 bus->count_cells(blob, parent, &na, &ns); in fdt_translate_address()
197 pr_debug("bus (na=%d, ns=%d) on %s\n", in fdt_translate_address()
203 /* Switch to parent bus */ in fdt_translate_address()
214 /* Get new parent bus and counts */ in fdt_translate_address()
216 pbus->count_cells(blob, parent, &pna, &pns); in fdt_translate_address()
223 pr_debug("parent bus (na=%d, ns=%d) on %s\n", in fdt_translate_address()
226 /* Apply bus translation */ in fdt_translate_address()
227 if (fdt_translate_one(blob, node_offset, bus, pbus, in fdt_translate_address()
234 bus = pbus; in fdt_translate_address()
243 * of_flat_dt_translate_address - translate DT addr into CPU phys addr