Lines Matching refs:ar
51 static inline u32 shadow_sr_wr_ind_addr(struct ath10k *ar, in shadow_sr_wr_ind_addr() argument
74 ath10k_warn(ar, "invalid CE id: %d", ce_id); in shadow_sr_wr_ind_addr()
80 static inline u32 shadow_dst_wr_ind_addr(struct ath10k *ar, in shadow_dst_wr_ind_addr() argument
112 ath10k_warn(ar, "invalid CE id: %d", ce_id); in shadow_dst_wr_ind_addr()
133 static inline u32 ath10k_ce_read32(struct ath10k *ar, u32 offset) in ath10k_ce_read32() argument
135 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_read32()
137 return ce->bus_ops->read32(ar, offset); in ath10k_ce_read32()
140 static inline void ath10k_ce_write32(struct ath10k *ar, u32 offset, u32 value) in ath10k_ce_write32() argument
142 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_write32()
144 ce->bus_ops->write32(ar, offset, value); in ath10k_ce_write32()
147 static inline void ath10k_ce_dest_ring_write_index_set(struct ath10k *ar, in ath10k_ce_dest_ring_write_index_set() argument
151 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_write_index_set()
152 ar->hw_ce_regs->dst_wr_index_addr, n); in ath10k_ce_dest_ring_write_index_set()
155 static inline u32 ath10k_ce_dest_ring_write_index_get(struct ath10k *ar, in ath10k_ce_dest_ring_write_index_get() argument
158 return ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_write_index_get()
159 ar->hw_ce_regs->dst_wr_index_addr); in ath10k_ce_dest_ring_write_index_get()
162 static inline void ath10k_ce_src_ring_write_index_set(struct ath10k *ar, in ath10k_ce_src_ring_write_index_set() argument
166 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_write_index_set()
167 ar->hw_ce_regs->sr_wr_index_addr, n); in ath10k_ce_src_ring_write_index_set()
170 static inline u32 ath10k_ce_src_ring_write_index_get(struct ath10k *ar, in ath10k_ce_src_ring_write_index_get() argument
173 return ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_write_index_get()
174 ar->hw_ce_regs->sr_wr_index_addr); in ath10k_ce_src_ring_write_index_get()
177 static inline u32 ath10k_ce_src_ring_read_index_from_ddr(struct ath10k *ar, in ath10k_ce_src_ring_read_index_from_ddr() argument
180 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_src_ring_read_index_from_ddr()
185 static inline u32 ath10k_ce_src_ring_read_index_get(struct ath10k *ar, in ath10k_ce_src_ring_read_index_get() argument
188 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_src_ring_read_index_get()
193 if (ar->hw_params.rri_on_ddr && in ath10k_ce_src_ring_read_index_get()
195 index = ath10k_ce_src_ring_read_index_from_ddr(ar, ce_id); in ath10k_ce_src_ring_read_index_get()
197 index = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_read_index_get()
198 ar->hw_ce_regs->current_srri_addr); in ath10k_ce_src_ring_read_index_get()
204 ath10k_ce_shadow_src_ring_write_index_set(struct ath10k *ar, in ath10k_ce_shadow_src_ring_write_index_set() argument
208 ath10k_ce_write32(ar, shadow_sr_wr_ind_addr(ar, ce_state), value); in ath10k_ce_shadow_src_ring_write_index_set()
212 ath10k_ce_shadow_dest_ring_write_index_set(struct ath10k *ar, in ath10k_ce_shadow_dest_ring_write_index_set() argument
216 ath10k_ce_write32(ar, shadow_dst_wr_ind_addr(ar, ce_state), value); in ath10k_ce_shadow_dest_ring_write_index_set()
219 static inline void ath10k_ce_src_ring_base_addr_set(struct ath10k *ar, in ath10k_ce_src_ring_base_addr_set() argument
223 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_src_ring_base_addr_set()
225 u32 ce_ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_src_ring_base_addr_set()
228 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_base_addr_set()
229 ar->hw_ce_regs->sr_base_addr_lo, addr_lo); in ath10k_ce_src_ring_base_addr_set()
232 ce_state->ops->ce_set_src_ring_base_addr_hi(ar, ce_ctrl_addr, in ath10k_ce_src_ring_base_addr_set()
237 static void ath10k_ce_set_src_ring_base_addr_hi(struct ath10k *ar, in ath10k_ce_set_src_ring_base_addr_hi() argument
243 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_set_src_ring_base_addr_hi()
244 ar->hw_ce_regs->sr_base_addr_hi, addr_hi); in ath10k_ce_set_src_ring_base_addr_hi()
247 static inline void ath10k_ce_src_ring_size_set(struct ath10k *ar, in ath10k_ce_src_ring_size_set() argument
251 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_size_set()
252 ar->hw_ce_regs->sr_size_addr, n); in ath10k_ce_src_ring_size_set()
255 static inline void ath10k_ce_src_ring_dmax_set(struct ath10k *ar, in ath10k_ce_src_ring_dmax_set() argument
259 struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar->hw_ce_regs->ctrl1_regs; in ath10k_ce_src_ring_dmax_set()
261 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_dmax_set()
264 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_src_ring_dmax_set()
269 static inline void ath10k_ce_src_ring_byte_swap_set(struct ath10k *ar, in ath10k_ce_src_ring_byte_swap_set() argument
273 struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar->hw_ce_regs->ctrl1_regs; in ath10k_ce_src_ring_byte_swap_set()
275 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_src_ring_byte_swap_set()
278 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_src_ring_byte_swap_set()
283 static inline void ath10k_ce_dest_ring_byte_swap_set(struct ath10k *ar, in ath10k_ce_dest_ring_byte_swap_set() argument
287 struct ath10k_hw_ce_ctrl1 *ctrl_regs = ar->hw_ce_regs->ctrl1_regs; in ath10k_ce_dest_ring_byte_swap_set()
289 u32 ctrl1_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_byte_swap_set()
292 ath10k_ce_write32(ar, ce_ctrl_addr + ctrl_regs->addr, in ath10k_ce_dest_ring_byte_swap_set()
298 u32 ath10k_ce_dest_ring_read_index_from_ddr(struct ath10k *ar, u32 ce_id) in ath10k_ce_dest_ring_read_index_from_ddr() argument
300 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_dest_ring_read_index_from_ddr()
306 static inline u32 ath10k_ce_dest_ring_read_index_get(struct ath10k *ar, in ath10k_ce_dest_ring_read_index_get() argument
309 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_dest_ring_read_index_get()
314 if (ar->hw_params.rri_on_ddr && in ath10k_ce_dest_ring_read_index_get()
316 index = ath10k_ce_dest_ring_read_index_from_ddr(ar, ce_id); in ath10k_ce_dest_ring_read_index_get()
318 index = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_read_index_get()
319 ar->hw_ce_regs->current_drri_addr); in ath10k_ce_dest_ring_read_index_get()
324 static inline void ath10k_ce_dest_ring_base_addr_set(struct ath10k *ar, in ath10k_ce_dest_ring_base_addr_set() argument
328 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_dest_ring_base_addr_set()
330 u32 ce_ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_dest_ring_base_addr_set()
333 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_base_addr_set()
334 ar->hw_ce_regs->dr_base_addr_lo, addr_lo); in ath10k_ce_dest_ring_base_addr_set()
337 ce_state->ops->ce_set_dest_ring_base_addr_hi(ar, ce_ctrl_addr, in ath10k_ce_dest_ring_base_addr_set()
342 static void ath10k_ce_set_dest_ring_base_addr_hi(struct ath10k *ar, in ath10k_ce_set_dest_ring_base_addr_hi() argument
349 reg_value = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_set_dest_ring_base_addr_hi()
350 ar->hw_ce_regs->dr_base_addr_hi); in ath10k_ce_set_dest_ring_base_addr_hi()
353 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_set_dest_ring_base_addr_hi()
354 ar->hw_ce_regs->dr_base_addr_hi, reg_value); in ath10k_ce_set_dest_ring_base_addr_hi()
357 static inline void ath10k_ce_dest_ring_size_set(struct ath10k *ar, in ath10k_ce_dest_ring_size_set() argument
361 ath10k_ce_write32(ar, ce_ctrl_addr + in ath10k_ce_dest_ring_size_set()
362 ar->hw_ce_regs->dr_size_addr, n); in ath10k_ce_dest_ring_size_set()
365 static inline void ath10k_ce_src_ring_highmark_set(struct ath10k *ar, in ath10k_ce_src_ring_highmark_set() argument
369 struct ath10k_hw_ce_dst_src_wm_regs *srcr_wm = ar->hw_ce_regs->wm_srcr; in ath10k_ce_src_ring_highmark_set()
370 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm->addr); in ath10k_ce_src_ring_highmark_set()
372 ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr, in ath10k_ce_src_ring_highmark_set()
377 static inline void ath10k_ce_src_ring_lowmark_set(struct ath10k *ar, in ath10k_ce_src_ring_lowmark_set() argument
381 struct ath10k_hw_ce_dst_src_wm_regs *srcr_wm = ar->hw_ce_regs->wm_srcr; in ath10k_ce_src_ring_lowmark_set()
382 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + srcr_wm->addr); in ath10k_ce_src_ring_lowmark_set()
384 ath10k_ce_write32(ar, ce_ctrl_addr + srcr_wm->addr, in ath10k_ce_src_ring_lowmark_set()
389 static inline void ath10k_ce_dest_ring_highmark_set(struct ath10k *ar, in ath10k_ce_dest_ring_highmark_set() argument
393 struct ath10k_hw_ce_dst_src_wm_regs *dstr_wm = ar->hw_ce_regs->wm_dstr; in ath10k_ce_dest_ring_highmark_set()
394 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm->addr); in ath10k_ce_dest_ring_highmark_set()
396 ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr, in ath10k_ce_dest_ring_highmark_set()
401 static inline void ath10k_ce_dest_ring_lowmark_set(struct ath10k *ar, in ath10k_ce_dest_ring_lowmark_set() argument
405 struct ath10k_hw_ce_dst_src_wm_regs *dstr_wm = ar->hw_ce_regs->wm_dstr; in ath10k_ce_dest_ring_lowmark_set()
406 u32 addr = ath10k_ce_read32(ar, ce_ctrl_addr + dstr_wm->addr); in ath10k_ce_dest_ring_lowmark_set()
408 ath10k_ce_write32(ar, ce_ctrl_addr + dstr_wm->addr, in ath10k_ce_dest_ring_lowmark_set()
413 static inline void ath10k_ce_copy_complete_inter_enable(struct ath10k *ar, in ath10k_ce_copy_complete_inter_enable() argument
416 struct ath10k_hw_ce_host_ie *host_ie = ar->hw_ce_regs->host_ie; in ath10k_ce_copy_complete_inter_enable()
418 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_copy_complete_inter_enable()
419 ar->hw_ce_regs->host_ie_addr); in ath10k_ce_copy_complete_inter_enable()
421 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_copy_complete_inter_enable()
425 static inline void ath10k_ce_copy_complete_intr_disable(struct ath10k *ar, in ath10k_ce_copy_complete_intr_disable() argument
428 struct ath10k_hw_ce_host_ie *host_ie = ar->hw_ce_regs->host_ie; in ath10k_ce_copy_complete_intr_disable()
430 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_copy_complete_intr_disable()
431 ar->hw_ce_regs->host_ie_addr); in ath10k_ce_copy_complete_intr_disable()
433 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_copy_complete_intr_disable()
437 static inline void ath10k_ce_watermark_intr_disable(struct ath10k *ar, in ath10k_ce_watermark_intr_disable() argument
440 struct ath10k_hw_ce_host_wm_regs *wm_regs = ar->hw_ce_regs->wm_regs; in ath10k_ce_watermark_intr_disable()
442 u32 host_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_watermark_intr_disable()
443 ar->hw_ce_regs->host_ie_addr); in ath10k_ce_watermark_intr_disable()
445 ath10k_ce_write32(ar, ce_ctrl_addr + ar->hw_ce_regs->host_ie_addr, in ath10k_ce_watermark_intr_disable()
449 static inline void ath10k_ce_error_intr_enable(struct ath10k *ar, in ath10k_ce_error_intr_enable() argument
452 struct ath10k_hw_ce_misc_regs *misc_regs = ar->hw_ce_regs->misc_regs; in ath10k_ce_error_intr_enable()
454 u32 misc_ie_addr = ath10k_ce_read32(ar, ce_ctrl_addr + in ath10k_ce_error_intr_enable()
455 ar->hw_ce_regs->misc_ie_addr); in ath10k_ce_error_intr_enable()
457 ath10k_ce_write32(ar, in ath10k_ce_error_intr_enable()
458 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr, in ath10k_ce_error_intr_enable()
462 static inline void ath10k_ce_error_intr_disable(struct ath10k *ar, in ath10k_ce_error_intr_disable() argument
465 struct ath10k_hw_ce_misc_regs *misc_regs = ar->hw_ce_regs->misc_regs; in ath10k_ce_error_intr_disable()
467 u32 misc_ie_addr = ath10k_ce_read32(ar, in ath10k_ce_error_intr_disable()
468 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr); in ath10k_ce_error_intr_disable()
470 ath10k_ce_write32(ar, in ath10k_ce_error_intr_disable()
471 ce_ctrl_addr + ar->hw_ce_regs->misc_ie_addr, in ath10k_ce_error_intr_disable()
475 static inline void ath10k_ce_engine_int_status_clear(struct ath10k *ar, in ath10k_ce_engine_int_status_clear() argument
479 struct ath10k_hw_ce_host_wm_regs *wm_regs = ar->hw_ce_regs->wm_regs; in ath10k_ce_engine_int_status_clear()
481 ath10k_ce_write32(ar, ce_ctrl_addr + wm_regs->addr, mask); in ath10k_ce_engine_int_status_clear()
495 struct ath10k *ar = ce_state->ar; in _ath10k_ce_send_nolock() local
506 ath10k_warn(ar, "%s: send more we can (nbytes: %d, max: %d)\n", in _ath10k_ce_send_nolock()
538 ath10k_ce_src_ring_write_index_set(ar, ctrl_addr, write_index); in _ath10k_ce_send_nolock()
552 struct ath10k *ar = ce_state->ar; in _ath10k_ce_send_nolock_64() local
563 if (test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags)) in _ath10k_ce_send_nolock_64()
567 ath10k_warn(ar, "%s: send more we can (nbytes: %d, max: %d)\n", in _ath10k_ce_send_nolock_64()
570 if (ar->hw_params.rri_on_ddr) in _ath10k_ce_send_nolock_64()
571 sw_index = ath10k_ce_src_ring_read_index_from_ddr(ar, ce_state->id); in _ath10k_ce_send_nolock_64()
613 if (ar->hw_params.shadow_reg_support) in _ath10k_ce_send_nolock_64()
614 ath10k_ce_shadow_src_ring_write_index_set(ar, ce_state, in _ath10k_ce_send_nolock_64()
617 ath10k_ce_src_ring_write_index_set(ar, ctrl_addr, in _ath10k_ce_send_nolock_64()
640 struct ath10k *ar = pipe->ar; in __ath10k_ce_send_revert() local
641 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_ce_send_revert()
656 ath10k_ce_src_ring_write_index_get(ar, ctrl_addr))) in __ath10k_ce_send_revert()
673 struct ath10k *ar = ce_state->ar; in ath10k_ce_send() local
674 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_send()
688 struct ath10k *ar = pipe->ar; in ath10k_ce_num_free_src_entries() local
689 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_num_free_src_entries()
704 struct ath10k *ar = pipe->ar; in __ath10k_ce_rx_num_free_bufs() local
705 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_ce_rx_num_free_bufs()
720 struct ath10k *ar = pipe->ar; in __ath10k_ce_rx_post_buf() local
721 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_ce_rx_post_buf()
741 ath10k_ce_dest_ring_write_index_set(ar, ctrl_addr, write_index); in __ath10k_ce_rx_post_buf()
751 struct ath10k *ar = pipe->ar; in __ath10k_ce_rx_post_buf_64() local
752 struct ath10k_ce *ce = ath10k_ce_priv(ar); in __ath10k_ce_rx_post_buf_64()
774 ath10k_ce_dest_ring_write_index_set(ar, ctrl_addr, write_index); in __ath10k_ce_rx_post_buf_64()
782 struct ath10k *ar = pipe->ar; in ath10k_ce_rx_update_write_idx() local
787 u32 cur_write_idx = ath10k_ce_dest_ring_write_index_get(ar, ctrl_addr); in ath10k_ce_rx_update_write_idx()
796 ath10k_ce_dest_ring_write_index_set(ar, ctrl_addr, write_index); in ath10k_ce_rx_update_write_idx()
804 struct ath10k *ar = pipe->ar; in ath10k_ce_rx_post_buf() local
805 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_rx_post_buf()
933 struct ath10k *ar = ce_state->ar; in ath10k_ce_completed_recv_next() local
934 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_completed_recv_next()
957 struct ath10k *ar; in _ath10k_ce_revoke_recv_next() local
965 ar = ce_state->ar; in _ath10k_ce_revoke_recv_next()
966 ce = ath10k_ce_priv(ar); in _ath10k_ce_revoke_recv_next()
1010 struct ath10k *ar; in _ath10k_ce_revoke_recv_next_64() local
1018 ar = ce_state->ar; in _ath10k_ce_revoke_recv_next_64()
1019 ce = ath10k_ce_priv(ar); in _ath10k_ce_revoke_recv_next_64()
1074 struct ath10k *ar = ce_state->ar; in _ath10k_ce_completed_send_next_nolock() local
1089 read_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); in _ath10k_ce_completed_send_next_nolock()
1097 if (ar->hw_params.rri_on_ddr) in _ath10k_ce_completed_send_next_nolock()
1098 read_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); in _ath10k_ce_completed_send_next_nolock()
1127 struct ath10k *ar = ce_state->ar; in _ath10k_ce_completed_send_next_nolock_64() local
1142 read_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); in _ath10k_ce_completed_send_next_nolock_64()
1150 if (ar->hw_params.rri_on_ddr) in _ath10k_ce_completed_send_next_nolock_64()
1151 read_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); in _ath10k_ce_completed_send_next_nolock_64()
1183 static void ath10k_ce_extract_desc_data(struct ath10k *ar, in ath10k_ce_extract_desc_data() argument
1200 static void ath10k_ce_extract_desc_data_64(struct ath10k *ar, in ath10k_ce_extract_desc_data_64() argument
1230 struct ath10k *ar; in ath10k_ce_cancel_send_next() local
1238 ar = ce_state->ar; in ath10k_ce_cancel_send_next()
1239 ce = ath10k_ce_priv(ar); in ath10k_ce_cancel_send_next()
1248 ce_state->ops->ce_extract_desc_data(ar, src_ring, sw_index, in ath10k_ce_cancel_send_next()
1276 struct ath10k *ar = ce_state->ar; in ath10k_ce_completed_send_next() local
1277 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_completed_send_next()
1295 void ath10k_ce_per_engine_service(struct ath10k *ar, unsigned int ce_id) in ath10k_ce_per_engine_service() argument
1297 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_per_engine_service()
1299 struct ath10k_hw_ce_host_wm_regs *wm_regs = ar->hw_ce_regs->wm_regs; in ath10k_ce_per_engine_service()
1312 ath10k_ce_engine_int_status_clear(ar, ctrl_addr, in ath10k_ce_per_engine_service()
1329 void ath10k_ce_per_engine_service_any(struct ath10k *ar) in ath10k_ce_per_engine_service_any() argument
1334 intr_summary = ath10k_ce_interrupt_summary(ar); in ath10k_ce_per_engine_service_any()
1343 ath10k_ce_per_engine_service(ar, ce_id); in ath10k_ce_per_engine_service_any()
1358 struct ath10k *ar = ce_state->ar; in ath10k_ce_per_engine_handler_adjust() local
1363 ath10k_ce_copy_complete_inter_enable(ar, ctrl_addr); in ath10k_ce_per_engine_handler_adjust()
1365 ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr); in ath10k_ce_per_engine_handler_adjust()
1367 ath10k_ce_watermark_intr_disable(ar, ctrl_addr); in ath10k_ce_per_engine_handler_adjust()
1370 void ath10k_ce_disable_interrupt(struct ath10k *ar, int ce_id) in ath10k_ce_disable_interrupt() argument
1372 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_disable_interrupt()
1380 ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_disable_interrupt()
1382 ath10k_ce_copy_complete_intr_disable(ar, ctrl_addr); in ath10k_ce_disable_interrupt()
1383 ath10k_ce_error_intr_disable(ar, ctrl_addr); in ath10k_ce_disable_interrupt()
1384 ath10k_ce_watermark_intr_disable(ar, ctrl_addr); in ath10k_ce_disable_interrupt()
1388 void ath10k_ce_disable_interrupts(struct ath10k *ar) in ath10k_ce_disable_interrupts() argument
1393 ath10k_ce_disable_interrupt(ar, ce_id); in ath10k_ce_disable_interrupts()
1397 void ath10k_ce_enable_interrupt(struct ath10k *ar, int ce_id) in ath10k_ce_enable_interrupt() argument
1399 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_enable_interrupt()
1410 void ath10k_ce_enable_interrupts(struct ath10k *ar) in ath10k_ce_enable_interrupts() argument
1418 ath10k_ce_enable_interrupt(ar, ce_id); in ath10k_ce_enable_interrupts()
1422 static int ath10k_ce_init_src_ring(struct ath10k *ar, in ath10k_ce_init_src_ring() argument
1426 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_init_src_ring()
1429 u32 nentries, ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_init_src_ring()
1433 if (ar->hw_params.target_64bit) in ath10k_ce_init_src_ring()
1440 src_ring->sw_index = ath10k_ce_src_ring_read_index_get(ar, ctrl_addr); in ath10k_ce_init_src_ring()
1445 ath10k_ce_src_ring_write_index_get(ar, ctrl_addr); in ath10k_ce_init_src_ring()
1448 ath10k_ce_src_ring_base_addr_set(ar, ce_id, in ath10k_ce_init_src_ring()
1450 ath10k_ce_src_ring_size_set(ar, ctrl_addr, nentries); in ath10k_ce_init_src_ring()
1451 ath10k_ce_src_ring_dmax_set(ar, ctrl_addr, attr->src_sz_max); in ath10k_ce_init_src_ring()
1452 ath10k_ce_src_ring_byte_swap_set(ar, ctrl_addr, 0); in ath10k_ce_init_src_ring()
1453 ath10k_ce_src_ring_lowmark_set(ar, ctrl_addr, 0); in ath10k_ce_init_src_ring()
1454 ath10k_ce_src_ring_highmark_set(ar, ctrl_addr, nentries); in ath10k_ce_init_src_ring()
1456 ath10k_dbg(ar, ATH10K_DBG_BOOT, in ath10k_ce_init_src_ring()
1463 static int ath10k_ce_init_dest_ring(struct ath10k *ar, in ath10k_ce_init_dest_ring() argument
1467 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_init_dest_ring()
1470 u32 nentries, ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_init_dest_ring()
1474 if (ar->hw_params.target_64bit) in ath10k_ce_init_dest_ring()
1481 dest_ring->sw_index = ath10k_ce_dest_ring_read_index_get(ar, ctrl_addr); in ath10k_ce_init_dest_ring()
1484 ath10k_ce_dest_ring_write_index_get(ar, ctrl_addr); in ath10k_ce_init_dest_ring()
1487 ath10k_ce_dest_ring_base_addr_set(ar, ce_id, in ath10k_ce_init_dest_ring()
1489 ath10k_ce_dest_ring_size_set(ar, ctrl_addr, nentries); in ath10k_ce_init_dest_ring()
1490 ath10k_ce_dest_ring_byte_swap_set(ar, ctrl_addr, 0); in ath10k_ce_init_dest_ring()
1491 ath10k_ce_dest_ring_lowmark_set(ar, ctrl_addr, 0); in ath10k_ce_init_dest_ring()
1492 ath10k_ce_dest_ring_highmark_set(ar, ctrl_addr, nentries); in ath10k_ce_init_dest_ring()
1494 ath10k_dbg(ar, ATH10K_DBG_BOOT, in ath10k_ce_init_dest_ring()
1501 static int ath10k_ce_alloc_shadow_base(struct ath10k *ar, in ath10k_ce_alloc_shadow_base() argument
1518 ath10k_ce_alloc_src_ring(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_alloc_src_ring() argument
1541 dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_src_ring()
1559 if (ar->hw_params.shadow_reg_support) { in ath10k_ce_alloc_src_ring()
1560 ret = ath10k_ce_alloc_shadow_base(ar, src_ring, nentries); in ath10k_ce_alloc_src_ring()
1562 dma_free_coherent(ar->dev, in ath10k_ce_alloc_src_ring()
1576 ath10k_ce_alloc_src_ring_64(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_alloc_src_ring_64() argument
1598 dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_src_ring_64()
1616 if (ar->hw_params.shadow_reg_support) { in ath10k_ce_alloc_src_ring_64()
1617 ret = ath10k_ce_alloc_shadow_base(ar, src_ring, nentries); in ath10k_ce_alloc_src_ring_64()
1619 dma_free_coherent(ar->dev, in ath10k_ce_alloc_src_ring_64()
1633 ath10k_ce_alloc_dest_ring(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_alloc_dest_ring() argument
1655 dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_dest_ring()
1677 ath10k_ce_alloc_dest_ring_64(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_alloc_dest_ring_64() argument
1698 dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_dest_ring_64()
1729 int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id, in ath10k_ce_init_pipe() argument
1735 ret = ath10k_ce_init_src_ring(ar, ce_id, attr); in ath10k_ce_init_pipe()
1737 ath10k_err(ar, "Failed to initialize CE src ring for ID: %d (%d)\n", in ath10k_ce_init_pipe()
1744 ret = ath10k_ce_init_dest_ring(ar, ce_id, attr); in ath10k_ce_init_pipe()
1746 ath10k_err(ar, "Failed to initialize CE dest ring for ID: %d (%d)\n", in ath10k_ce_init_pipe()
1756 static void ath10k_ce_deinit_src_ring(struct ath10k *ar, unsigned int ce_id) in ath10k_ce_deinit_src_ring() argument
1758 u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_deinit_src_ring()
1760 ath10k_ce_src_ring_base_addr_set(ar, ce_id, 0); in ath10k_ce_deinit_src_ring()
1761 ath10k_ce_src_ring_size_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_src_ring()
1762 ath10k_ce_src_ring_dmax_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_src_ring()
1763 ath10k_ce_src_ring_highmark_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_src_ring()
1766 static void ath10k_ce_deinit_dest_ring(struct ath10k *ar, unsigned int ce_id) in ath10k_ce_deinit_dest_ring() argument
1768 u32 ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_deinit_dest_ring()
1770 ath10k_ce_dest_ring_base_addr_set(ar, ce_id, 0); in ath10k_ce_deinit_dest_ring()
1771 ath10k_ce_dest_ring_size_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_dest_ring()
1772 ath10k_ce_dest_ring_highmark_set(ar, ctrl_addr, 0); in ath10k_ce_deinit_dest_ring()
1775 void ath10k_ce_deinit_pipe(struct ath10k *ar, unsigned int ce_id) in ath10k_ce_deinit_pipe() argument
1777 ath10k_ce_deinit_src_ring(ar, ce_id); in ath10k_ce_deinit_pipe()
1778 ath10k_ce_deinit_dest_ring(ar, ce_id); in ath10k_ce_deinit_pipe()
1782 static void _ath10k_ce_free_pipe(struct ath10k *ar, int ce_id) in _ath10k_ce_free_pipe() argument
1784 struct ath10k_ce *ce = ath10k_ce_priv(ar); in _ath10k_ce_free_pipe()
1788 if (ar->hw_params.shadow_reg_support) in _ath10k_ce_free_pipe()
1790 dma_free_coherent(ar->dev, in _ath10k_ce_free_pipe()
1800 dma_free_coherent(ar->dev, in _ath10k_ce_free_pipe()
1813 static void _ath10k_ce_free_pipe_64(struct ath10k *ar, int ce_id) in _ath10k_ce_free_pipe_64() argument
1815 struct ath10k_ce *ce = ath10k_ce_priv(ar); in _ath10k_ce_free_pipe_64()
1819 if (ar->hw_params.shadow_reg_support) in _ath10k_ce_free_pipe_64()
1821 dma_free_coherent(ar->dev, in _ath10k_ce_free_pipe_64()
1831 dma_free_coherent(ar->dev, in _ath10k_ce_free_pipe_64()
1844 void ath10k_ce_free_pipe(struct ath10k *ar, int ce_id) in ath10k_ce_free_pipe() argument
1846 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_free_pipe()
1849 ce_state->ops->ce_free_pipe(ar, ce_id); in ath10k_ce_free_pipe()
1853 void ath10k_ce_dump_registers(struct ath10k *ar, in ath10k_ce_dump_registers() argument
1856 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_dump_registers()
1860 lockdep_assert_held(&ar->dump_mutex); in ath10k_ce_dump_registers()
1862 ath10k_err(ar, "Copy Engine register dump:\n"); in ath10k_ce_dump_registers()
1866 addr = ath10k_ce_base_address(ar, id); in ath10k_ce_dump_registers()
1870 cpu_to_le32(ath10k_ce_src_ring_write_index_get(ar, addr)); in ath10k_ce_dump_registers()
1872 cpu_to_le32(ath10k_ce_src_ring_read_index_get(ar, addr)); in ath10k_ce_dump_registers()
1874 cpu_to_le32(ath10k_ce_dest_ring_write_index_get(ar, addr)); in ath10k_ce_dump_registers()
1876 cpu_to_le32(ath10k_ce_dest_ring_read_index_get(ar, addr)); in ath10k_ce_dump_registers()
1881 ath10k_err(ar, "[%02d]: 0x%08x %3u %3u %3u %3u", id, in ath10k_ce_dump_registers()
1922 static void ath10k_ce_set_ops(struct ath10k *ar, in ath10k_ce_set_ops() argument
1925 switch (ar->hw_rev) { in ath10k_ce_set_ops()
1935 int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id, in ath10k_ce_alloc_pipe() argument
1938 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_alloc_pipe()
1942 ath10k_ce_set_ops(ar, ce_state); in ath10k_ce_alloc_pipe()
1955 ce_state->ar = ar; in ath10k_ce_alloc_pipe()
1957 ce_state->ctrl_addr = ath10k_ce_base_address(ar, ce_id); in ath10k_ce_alloc_pipe()
1969 ce_state->ops->ce_alloc_src_ring(ar, ce_id, attr); in ath10k_ce_alloc_pipe()
1972 ath10k_err(ar, "failed to alloc CE src ring %d: %d\n", in ath10k_ce_alloc_pipe()
1980 ce_state->dest_ring = ce_state->ops->ce_alloc_dst_ring(ar, in ath10k_ce_alloc_pipe()
1985 ath10k_err(ar, "failed to alloc CE dest ring %d: %d\n", in ath10k_ce_alloc_pipe()
1996 void ath10k_ce_alloc_rri(struct ath10k *ar) in ath10k_ce_alloc_rri() argument
2002 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_alloc_rri()
2004 ce->vaddr_rri = dma_alloc_coherent(ar->dev, in ath10k_ce_alloc_rri()
2011 ath10k_ce_write32(ar, ar->hw_ce_regs->ce_rri_low, in ath10k_ce_alloc_rri()
2013 ath10k_ce_write32(ar, ar->hw_ce_regs->ce_rri_high, in ath10k_ce_alloc_rri()
2018 ctrl1_regs = ar->hw_ce_regs->ctrl1_regs->addr; in ath10k_ce_alloc_rri()
2019 ce_base_addr = ath10k_ce_base_address(ar, i); in ath10k_ce_alloc_rri()
2020 value = ath10k_ce_read32(ar, ce_base_addr + ctrl1_regs); in ath10k_ce_alloc_rri()
2021 value |= ar->hw_ce_regs->upd->mask; in ath10k_ce_alloc_rri()
2022 ath10k_ce_write32(ar, ce_base_addr + ctrl1_regs, value); in ath10k_ce_alloc_rri()
2027 void ath10k_ce_free_rri(struct ath10k *ar) in ath10k_ce_free_rri() argument
2029 struct ath10k_ce *ce = ath10k_ce_priv(ar); in ath10k_ce_free_rri()
2031 dma_free_coherent(ar->dev, (CE_COUNT * sizeof(u32)), in ath10k_ce_free_rri()