275 	read_zsreg(c, R1);  in z8530_flush_fifo()
276 	read_zsreg(c, R1);  in z8530_flush_fifo()
277 	read_zsreg(c, R1);  in z8530_flush_fifo()
278 	read_zsreg(c, R1);  in z8530_flush_fifo()
281 		read_zsreg(c, R1);  in z8530_flush_fifo()
282 		read_zsreg(c, R1);  in z8530_flush_fifo()
283 		read_zsreg(c, R1);  in z8530_flush_fifo()
284 		read_zsreg(c, R1);  in z8530_flush_fifo()
342 		stat=read_zsreg(c, R1);  in z8530_rx()
511 		status=read_zsreg(chan, R1);  in z8530_dma_rx()
633 	stat=read_zsreg(c, R1);  in z8530_rx_clear()
803 	c->regs[R1]|=TxINT_ENAB;  in z8530_sync_open()
804 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_open()
909 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_dma_open()
910 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_open()
916 	c->regs[R1]|= WT_FN_RDYFN;  in z8530_sync_dma_open()
917 	c->regs[R1]|= WT_RDY_RT;  in z8530_sync_dma_open()
918 	c->regs[R1]|= INT_ERR_Rx;  in z8530_sync_dma_open()
919 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_dma_open()
920 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_open()
921 	c->regs[R1]|= WT_RDY_ENAB;  in z8530_sync_dma_open()
922 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_dma_open()
1008 	c->regs[R1]&= ~WT_RDY_ENAB;  in z8530_sync_dma_close()
1009 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_dma_close()
1010 	c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx);  in z8530_sync_dma_close()
1011 	c->regs[R1]|= INT_ALL_Rx;  in z8530_sync_dma_close()
1012 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_close()
1105 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_txdma_open()
1106 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_txdma_open()
1177 	c->regs[R1]&= ~WT_RDY_ENAB;  in z8530_sync_txdma_close()
1178 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_txdma_close()
1179 	c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx);  in z8530_sync_txdma_close()
1180 	c->regs[R1]|= INT_ALL_Rx;  in z8530_sync_txdma_close()
1181 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_txdma_close()