624 	u32 read_buf;  in smsc95xx_set_features()  local
627 	ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);  in smsc95xx_set_features()
632 		read_buf |= Tx_COE_EN_;  in smsc95xx_set_features()
634 		read_buf &= ~Tx_COE_EN_;  in smsc95xx_set_features()
637 		read_buf |= Rx_COE_EN_;  in smsc95xx_set_features()
639 		read_buf &= ~Rx_COE_EN_;  in smsc95xx_set_features()
641 	ret = smsc95xx_write_reg(dev, COE_CR, read_buf);  in smsc95xx_set_features()
645 	netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);  in smsc95xx_set_features()
846 	u32 read_buf, write_buf, burst_cap;  in smsc95xx_reset()  local
858 		ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
862 	} while ((read_buf & HW_CFG_LRST_) && (timeout < 100));  in smsc95xx_reset()
876 		ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);  in smsc95xx_reset()
880 	} while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));  in smsc95xx_reset()
894 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
899 		  read_buf);  in smsc95xx_reset()
901 	read_buf |= HW_CFG_BIR_;  in smsc95xx_reset()
903 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
907 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
913 		  read_buf);  in smsc95xx_reset()
933 	ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);  in smsc95xx_reset()
939 		  read_buf);  in smsc95xx_reset()
945 	ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);  in smsc95xx_reset()
951 		  read_buf);  in smsc95xx_reset()
953 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
958 		  read_buf);  in smsc95xx_reset()
961 		read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);  in smsc95xx_reset()
963 	read_buf &= ~HW_CFG_RXDOFF_;  in smsc95xx_reset()
966 	read_buf |= NET_IP_ALIGN << 9;  in smsc95xx_reset()
968 	ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);  in smsc95xx_reset()
972 	ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);  in smsc95xx_reset()
977 		  "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);  in smsc95xx_reset()
983 	ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);  in smsc95xx_reset()
986 	netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);  in smsc95xx_reset()
1024 	ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);  in smsc95xx_reset()
1029 	read_buf |= INT_EP_CTL_PHY_INT_;  in smsc95xx_reset()
1031 	ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);  in smsc95xx_reset()