109 			netdev_err(dev->net, "asix_rx_fixup() Data Header synchronisation was lost, remaining %d\n",  in asix_rx_fixup_internal()
141 				netdev_err(dev->net, "asix_rx_fixup() Bad Header Length 0x%x, offset %d\n",  in asix_rx_fixup_internal()
184 		netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d, %d\n",  in asix_rx_fixup_internal()
278 		netdev_err(dev->net, "Failed to enable software MII access\n");  in asix_set_sw_mii()
287 		netdev_err(dev->net, "Failed to enable hardware MII access\n");  in asix_set_hw_mii()
300 		netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);  in asix_read_phy_addr()
324 		netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);  in asix_sw_reset()
335 		netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);  in asix_read_rx_ctl()
350 		netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",  in asix_write_rx_ctl()
363 		netdev_err(dev->net, "Error reading Medium Status register: %02x\n",  in asix_read_medium_status()
380 		netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",  in asix_write_medium_mode()
393 		netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",  in asix_write_gpio()
684 			netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word);  in asix_set_eeprom()
693 			netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word);  in asix_set_eeprom()
703 		netdev_err(net, "Failed to enable EEPROM write\n");  in asix_set_eeprom()
714 			netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n",  in asix_set_eeprom()
723 		netdev_err(net, "Failed to disable EEPROM write\n");  in asix_set_eeprom()