Lines Matching full:phydev
20 #define BRCM_PHY_MODEL(phydev) \ argument
21 ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
23 #define BRCM_PHY_REV(phydev) \ argument
24 ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask))
30 static int bcm54xx_config_clock_delay(struct phy_device *phydev) in bcm54xx_config_clock_delay() argument
35 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC); in bcm54xx_config_clock_delay()
37 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay()
38 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { in bcm54xx_config_clock_delay()
42 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in bcm54xx_config_clock_delay()
43 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { in bcm54xx_config_clock_delay()
47 rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, in bcm54xx_config_clock_delay()
53 val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL); in bcm54xx_config_clock_delay()
54 if (phydev->interface == PHY_INTERFACE_MODE_RGMII || in bcm54xx_config_clock_delay()
55 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { in bcm54xx_config_clock_delay()
59 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || in bcm54xx_config_clock_delay()
60 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { in bcm54xx_config_clock_delay()
64 rc = bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val); in bcm54xx_config_clock_delay()
71 static int bcm54210e_config_init(struct phy_device *phydev) in bcm54210e_config_init() argument
75 bcm54xx_config_clock_delay(phydev); in bcm54210e_config_init()
77 if (phydev->dev_flags & PHY_BRCM_EN_MASTER_MODE) { in bcm54210e_config_init()
78 val = phy_read(phydev, MII_CTRL1000); in bcm54210e_config_init()
80 phy_write(phydev, MII_CTRL1000, val); in bcm54210e_config_init()
86 static int bcm54612e_config_init(struct phy_device *phydev) in bcm54612e_config_init() argument
90 bcm54xx_config_clock_delay(phydev); in bcm54612e_config_init()
93 if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) { in bcm54612e_config_init()
96 reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0); in bcm54612e_config_init()
97 err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0, in bcm54612e_config_init()
107 static int bcm54616s_config_init(struct phy_device *phydev) in bcm54616s_config_init() argument
111 if (phydev->interface != PHY_INTERFACE_MODE_SGMII && in bcm54616s_config_init()
112 phydev->interface != PHY_INTERFACE_MODE_1000BASEX) in bcm54616s_config_init()
117 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC); in bcm54616s_config_init()
122 rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, in bcm54616s_config_init()
128 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE); in bcm54616s_config_init()
132 rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val); in bcm54616s_config_init()
137 rc = phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN); in bcm54616s_config_init()
143 val |= phydev->interface == PHY_INTERFACE_MODE_SGMII ? in bcm54616s_config_init()
146 rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val); in bcm54616s_config_init()
151 rc = phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN); in bcm54616s_config_init()
157 rc = bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, val); in bcm54616s_config_init()
162 return phy_clear_bits(phydev, MII_BMCR, BMCR_PDOWN); in bcm54616s_config_init()
166 static int bcm50610_a0_workaround(struct phy_device *phydev) in bcm50610_a0_workaround() argument
170 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH0, in bcm50610_a0_workaround()
176 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_AADJ1CH3, in bcm50610_a0_workaround()
181 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75, in bcm50610_a0_workaround()
186 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP96, in bcm50610_a0_workaround()
191 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP97, in bcm50610_a0_workaround()
197 static int bcm54xx_phydsp_config(struct phy_device *phydev) in bcm54xx_phydsp_config() argument
202 err = bcm54xx_auxctl_write(phydev, in bcm54xx_phydsp_config()
209 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_phydsp_config()
210 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) { in bcm54xx_phydsp_config()
212 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP08, in bcm54xx_phydsp_config()
217 if (phydev->drv->phy_id == PHY_ID_BCM50610) { in bcm54xx_phydsp_config()
218 err = bcm50610_a0_workaround(phydev); in bcm54xx_phydsp_config()
224 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM57780) { in bcm54xx_phydsp_config()
227 val = bcm_phy_read_exp(phydev, MII_BCM54XX_EXP_EXP75); in bcm54xx_phydsp_config()
232 err = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_EXP75, val); in bcm54xx_phydsp_config()
237 err2 = bcm54xx_auxctl_write(phydev, in bcm54xx_phydsp_config()
245 static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev) in bcm54xx_adjust_rxrefclk() argument
252 if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 && in bcm54xx_adjust_rxrefclk()
253 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 && in bcm54xx_adjust_rxrefclk()
254 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M && in bcm54xx_adjust_rxrefclk()
255 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810 && in bcm54xx_adjust_rxrefclk()
256 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) in bcm54xx_adjust_rxrefclk()
259 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3); in bcm54xx_adjust_rxrefclk()
265 if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_adjust_rxrefclk()
266 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) && in bcm54xx_adjust_rxrefclk()
267 BRCM_PHY_REV(phydev) >= 0x3) { in bcm54xx_adjust_rxrefclk()
274 if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) { in bcm54xx_adjust_rxrefclk()
275 if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) { in bcm54xx_adjust_rxrefclk()
283 if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) in bcm54xx_adjust_rxrefclk()
288 if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) { in bcm54xx_adjust_rxrefclk()
289 if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 || in bcm54xx_adjust_rxrefclk()
290 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54811) in bcm54xx_adjust_rxrefclk()
297 bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val); in bcm54xx_adjust_rxrefclk()
299 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD); in bcm54xx_adjust_rxrefclk()
305 if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) in bcm54xx_adjust_rxrefclk()
311 bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val); in bcm54xx_adjust_rxrefclk()
314 static int bcm54xx_config_init(struct phy_device *phydev) in bcm54xx_config_init() argument
318 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm54xx_config_init()
324 err = phy_write(phydev, MII_BCM54XX_ECR, reg); in bcm54xx_config_init()
332 err = phy_write(phydev, MII_BCM54XX_IMR, reg); in bcm54xx_config_init()
336 if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 || in bcm54xx_config_init()
337 BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) && in bcm54xx_config_init()
338 (phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE)) in bcm54xx_config_init()
339 bcm_phy_write_shadow(phydev, BCM54XX_SHD_RGMII_MODE, 0); in bcm54xx_config_init()
341 bcm54xx_adjust_rxrefclk(phydev); in bcm54xx_config_init()
343 switch (BRCM_PHY_MODEL(phydev)) { in bcm54xx_config_init()
346 err = bcm54xx_config_clock_delay(phydev); in bcm54xx_config_init()
349 err = bcm54210e_config_init(phydev); in bcm54xx_config_init()
352 err = bcm54612e_config_init(phydev); in bcm54xx_config_init()
355 err = bcm54616s_config_init(phydev); in bcm54xx_config_init()
359 val = bcm_phy_read_exp(phydev, in bcm54xx_config_init()
362 err = bcm_phy_write_exp(phydev, in bcm54xx_config_init()
370 bcm54xx_phydsp_config(phydev); in bcm54xx_config_init()
378 bcm_phy_write_shadow(phydev, BCM5482_SHD_LEDS1, val); in bcm54xx_config_init()
383 bcm_phy_write_exp(phydev, BCM_EXP_MULTICOLOR, val); in bcm54xx_config_init()
388 static int bcm54xx_resume(struct phy_device *phydev) in bcm54xx_resume() argument
395 ret = genphy_resume(phydev); in bcm54xx_resume()
404 return bcm54xx_config_init(phydev); in bcm54xx_resume()
407 static int bcm54811_config_init(struct phy_device *phydev) in bcm54811_config_init() argument
412 reg = bcm_phy_read_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL); in bcm54811_config_init()
414 err = bcm_phy_write_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL, in bcm54811_config_init()
419 err = bcm54xx_config_init(phydev); in bcm54811_config_init()
422 if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) { in bcm54811_config_init()
423 reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0); in bcm54811_config_init()
424 err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0, in bcm54811_config_init()
433 static int bcm5482_config_init(struct phy_device *phydev) in bcm5482_config_init() argument
437 err = bcm54xx_config_init(phydev); in bcm5482_config_init()
439 if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) { in bcm5482_config_init()
443 reg = bcm_phy_read_shadow(phydev, BCM5482_SHD_SSD); in bcm5482_config_init()
444 bcm_phy_write_shadow(phydev, BCM5482_SHD_SSD, in bcm5482_config_init()
453 err = bcm_phy_read_exp(phydev, reg); in bcm5482_config_init()
456 err = bcm_phy_write_exp(phydev, reg, err | in bcm5482_config_init()
466 err = bcm_phy_read_exp(phydev, reg); in bcm5482_config_init()
469 err = bcm_phy_write_exp(phydev, reg, in bcm5482_config_init()
477 reg = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE); in bcm5482_config_init()
478 bcm_phy_write_shadow(phydev, BCM54XX_SHD_MODE, in bcm5482_config_init()
485 bcm_phy_write_shadow(phydev, BCM5482_SHD_LEDS1, in bcm5482_config_init()
495 phydev->autoneg = AUTONEG_DISABLE; in bcm5482_config_init()
496 phydev->speed = SPEED_1000; in bcm5482_config_init()
497 phydev->duplex = DUPLEX_FULL; in bcm5482_config_init()
503 static int bcm5482_read_status(struct phy_device *phydev) in bcm5482_read_status() argument
507 err = genphy_read_status(phydev); in bcm5482_read_status()
509 if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) { in bcm5482_read_status()
514 if (phydev->link) { in bcm5482_read_status()
515 phydev->speed = SPEED_1000; in bcm5482_read_status()
516 phydev->duplex = DUPLEX_FULL; in bcm5482_read_status()
523 static int bcm5481_config_aneg(struct phy_device *phydev) in bcm5481_config_aneg() argument
525 struct device_node *np = phydev->mdio.dev.of_node; in bcm5481_config_aneg()
529 ret = genphy_config_aneg(phydev); in bcm5481_config_aneg()
532 bcm54xx_config_clock_delay(phydev); in bcm5481_config_aneg()
536 ret = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_SEL_ER + 0x9, in bcm5481_config_aneg()
545 static int bcm54616s_probe(struct phy_device *phydev) in bcm54616s_probe() argument
549 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_MODE); in bcm54616s_probe()
560 val = bcm_phy_read_shadow(phydev, BCM54616S_SHD_100FX_CTRL); in bcm54616s_probe()
570 phydev->dev_flags |= PHY_BCM_FLAGS_MODE_1000BX; in bcm54616s_probe()
572 phydev->port = PORT_FIBRE; in bcm54616s_probe()
578 static int bcm54616s_config_aneg(struct phy_device *phydev) in bcm54616s_config_aneg() argument
583 if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) in bcm54616s_config_aneg()
584 ret = genphy_c37_config_aneg(phydev); in bcm54616s_config_aneg()
586 ret = genphy_config_aneg(phydev); in bcm54616s_config_aneg()
589 bcm54xx_config_clock_delay(phydev); in bcm54616s_config_aneg()
594 static int bcm54616s_read_status(struct phy_device *phydev) in bcm54616s_read_status() argument
598 if (phydev->dev_flags & PHY_BCM_FLAGS_MODE_1000BX) in bcm54616s_read_status()
599 err = genphy_c37_read_status(phydev); in bcm54616s_read_status()
601 err = genphy_read_status(phydev); in bcm54616s_read_status()
606 static int brcm_phy_setbits(struct phy_device *phydev, int reg, int set) in brcm_phy_setbits() argument
610 val = phy_read(phydev, reg); in brcm_phy_setbits()
614 return phy_write(phydev, reg, val | set); in brcm_phy_setbits()
617 static int brcm_fet_config_init(struct phy_device *phydev) in brcm_fet_config_init() argument
622 err = phy_write(phydev, MII_BMCR, BMCR_RESET); in brcm_fet_config_init()
642 err = phy_read(phydev, MII_BMCR); in brcm_fet_config_init()
646 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_init()
657 err = phy_write(phydev, MII_BRCM_FET_INTREG, reg); in brcm_fet_config_init()
662 brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST); in brcm_fet_config_init()
668 err = phy_write(phydev, MII_BRCM_FET_BRCMTEST, reg); in brcm_fet_config_init()
673 reg = phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4); in brcm_fet_config_init()
682 err = phy_write(phydev, MII_BRCM_FET_SHDW_AUXMODE4, reg); in brcm_fet_config_init()
687 err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_MISCCTRL, in brcm_fet_config_init()
692 if (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE) { in brcm_fet_config_init()
694 err = brcm_phy_setbits(phydev, MII_BRCM_FET_SHDW_AUXSTAT2, in brcm_fet_config_init()
700 err2 = phy_write(phydev, MII_BRCM_FET_BRCMTEST, brcmtest); in brcm_fet_config_init()
707 static int brcm_fet_ack_interrupt(struct phy_device *phydev) in brcm_fet_ack_interrupt() argument
712 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_ack_interrupt()
719 static int brcm_fet_config_intr(struct phy_device *phydev) in brcm_fet_config_intr() argument
723 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_intr()
727 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in brcm_fet_config_intr()
732 err = phy_write(phydev, MII_BRCM_FET_INTREG, reg); in brcm_fet_config_intr()
740 static int bcm53xx_phy_probe(struct phy_device *phydev) in bcm53xx_phy_probe() argument
744 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL); in bcm53xx_phy_probe()
748 phydev->priv = priv; in bcm53xx_phy_probe()
750 priv->stats = devm_kcalloc(&phydev->mdio.dev, in bcm53xx_phy_probe()
751 bcm_phy_get_sset_count(phydev), sizeof(u64), in bcm53xx_phy_probe()
759 static void bcm53xx_phy_get_stats(struct phy_device *phydev, in bcm53xx_phy_get_stats() argument
762 struct bcm53xx_phy_priv *priv = phydev->priv; in bcm53xx_phy_get_stats()
764 bcm_phy_get_stats(phydev, priv->stats, stats, data); in bcm53xx_phy_get_stats()