Lines Matching +full:registers +full:- +full:based

1 # SPDX-License-Identifier: GPL-2.0-only
20 	  loadable module or built-in.
44 	tristate "APM X-Gene SoC MDIO bus controller"
48 	  APM X-Gene SoC's.
57 	  third revision of the ASPEED MDIO register interface - the first two
94 	tristate "GPIO lib-based bitbanged MDIO buses"
98 	  Supports GPIO lib-based MDIO busses.
101 	  will be called mdio-gpio.
114 	  Support I2C based PHYs.  This provides a MDIO bus bridged
160 	  IPQ40xx series Soc-s.
193 	tristate "Amlogic G12a based MDIO bus multiplexer"
204 	tristate "Broadcom iProc based MDIO bus multiplexers"
210 	  iProc based Broadcom SoCs. This multiplexer connects one of several
237 	tristate "MMIO device-controlled MDIO bus multiplexers"
242 	  are controlled via a simple memory-mapped device, like an FPGA.
245 	  the FPGA's registers.
247 	  Currently, only 8/16/32 bits registers are supported.