401 	struct regmap *regmap_dar;  member
501 	ret = regmap_write(lp->regmap_dar, DAR_PLL_INT0, PLL_INT[channel - 11]);  in mcr20a_set_channel()
504 	ret = regmap_write(lp->regmap_dar, DAR_PLL_FRAC0_LSB, 0x00);  in mcr20a_set_channel()
507 	ret = regmap_write(lp->regmap_dar, DAR_PLL_FRAC0_MSB,  in mcr20a_set_channel()
525 	ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL1,  in mcr20a_start()
534 	ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL2,  in mcr20a_start()
541 	ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL1,  in mcr20a_start()
557 	regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL1,  in mcr20a_stop()
598 			regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,  in mcr20a_set_hw_addr_filt()
601 			regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,  in mcr20a_set_hw_addr_filt()
626 			return regmap_write(lp->regmap_dar, DAR_PA_PWR,  in mcr20a_set_txpower()
672 	ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,  in mcr20a_set_cca_mode()
727 		ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,  in mcr20a_set_promiscuous_mode()
738 		ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,  in mcr20a_set_promiscuous_mode()
775 	regmap_update_bits_async(lp->regmap_dar, DAR_PHY_CTRL1,  in mcr20a_request_rx()
938 	regmap_update_bits_async(lp->regmap_dar, DAR_PHY_CTRL1,  in mcr20a_irq_status_complete()
1101 	ret = regmap_write(lp->regmap_dar, DAR_IRQ_STS1, 0xEF);  in mcr20a_phy_init()
1106 	ret = regmap_write(lp->regmap_dar, DAR_IRQ_STS2,  in mcr20a_phy_init()
1113 	ret = regmap_write(lp->regmap_dar, DAR_IRQ_STS3, 0xFF);  in mcr20a_phy_init()
1118 	ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL1,  in mcr20a_phy_init()
1122 	ret = regmap_write(lp->regmap_dar, DAR_PHY_CTRL2, 0xFF);  in mcr20a_phy_init()
1127 	ret = regmap_write(lp->regmap_dar, DAR_PHY_CTRL3,  in mcr20a_phy_init()
1136 	ret = regmap_write(lp->regmap_dar, DAR_SRC_CTRL,  in mcr20a_phy_init()
1156 	ret = regmap_write(lp->regmap_dar, DAR_OVERWRITE_VER,  in mcr20a_phy_init()
1174 		ret = regmap_write(lp->regmap_dar, DAR_SRC_CTRL, phy_reg);  in mcr20a_phy_init()
1206 	ret = regmap_update_bits(lp->regmap_dar, DAR_PWR_MODES,  in mcr20a_phy_init()
1213 	ret = regmap_update_bits(lp->regmap_dar, DAR_CLK_OUT_CTRL,  in mcr20a_phy_init()
1284 	lp->regmap_dar = devm_regmap_init_spi(spi, &mcr20a_dar_regmap);  in mcr20a_probe()
1285 	if (IS_ERR(lp->regmap_dar)) {  in mcr20a_probe()
1286 		ret = PTR_ERR(lp->regmap_dar);  in mcr20a_probe()