61 	wr32(XSCT_DCTL, dctl.reg);  in fjes_hw_reset()
177 	wr32(XSCT_REQBL, (__le32)(param->req_len));  in fjes_hw_init_command_registers()
179 	wr32(XSCT_RESPBL, (__le32)(param->res_len));  in fjes_hw_init_command_registers()
182 	wr32(XSCT_REQBAL,  in fjes_hw_init_command_registers()
184 	wr32(XSCT_REQBAH,  in fjes_hw_init_command_registers()
188 	wr32(XSCT_RESPBAL,  in fjes_hw_init_command_registers()
190 	wr32(XSCT_RESPBAH,  in fjes_hw_init_command_registers()
194 	wr32(XSCT_SHSTSAL,  in fjes_hw_init_command_registers()
196 	wr32(XSCT_SHSTSAH,  in fjes_hw_init_command_registers()
380 	wr32(XSCT_CR, cr.reg);  in fjes_hw_issue_request_command()
678 	wr32(XSCT_IG, cpu_to_le32(ig));  in fjes_hw_raise_interrupt()
696 		wr32(XSCT_IMS, intr_mask);  in fjes_hw_set_irqmask()
698 		wr32(XSCT_IMC, intr_mask);  in fjes_hw_set_irqmask()