481 #define BYTE_REG_BITS_ON(x, p)      do { iowrite8((ioread8((p))|(x)), (p)); } while (0)
489 #define BYTE_REG_BITS_OFF(x, p)     do { iowrite8(ioread8((p)) & (~(x)), (p)); } while (0)
493 #define BYTE_REG_BITS_SET(x, m, p)   do { iowrite8((ioread8((p)) & (~(m)))|(x), (p)); } while (0)
566 		iowrite8(mask >> 16, ioaddr + IntrStatus2);  in rhine_ack_events()
582 		iowrite8(ioread8(ioaddr + StickyHW) & 0xFC, ioaddr + StickyHW);  in rhine_power_init()
585 		iowrite8(0x80, ioaddr + WOLcgClr);  in rhine_power_init()
588 		iowrite8(0xFF, ioaddr + WOLcrClr);  in rhine_power_init()
591 			iowrite8(0x03, ioaddr + WOLcrClr1);  in rhine_power_init()
599 		iowrite8(0xFF, ioaddr + PwrcsrClr);  in rhine_power_init()
601 			iowrite8(0x03, ioaddr + PwrcsrClr1);  in rhine_power_init()
636 	iowrite8(Cmd1Reset, ioaddr + ChipCmd1);  in rhine_chip_reset()
644 			iowrite8(0x40, ioaddr + MiscCmd);  in rhine_chip_reset()
723 		iowrite8(ioread8(ioaddr + ConfigA) & 0xFC, ioaddr + ConfigA);  in rhine_reload_eeprom()
1359 	    iowrite8(ioread8(ioaddr + ChipCmd1) | Cmd1FDuplex,  in rhine_check_media()
1362 	    iowrite8(ioread8(ioaddr + ChipCmd1) & ~Cmd1FDuplex,  in rhine_check_media()
1399 	iowrite8(CAMC_CAMEN, ioaddr + CamCon);  in rhine_set_cam()
1405 	iowrite8((u8) idx, ioaddr + CamAddr);  in rhine_set_cam()
1408 		iowrite8(*addr, ioaddr + MulticastFilter0 + i);  in rhine_set_cam()
1412 	iowrite8(CAMC_CAMWR | CAMC_CAMEN, ioaddr + CamCon);  in rhine_set_cam()
1415 	iowrite8(0, ioaddr + CamCon);  in rhine_set_cam()
1428 	iowrite8(CAMC_CAMEN | CAMC_VCAMSL, ioaddr + CamCon);  in rhine_set_vlan_cam()
1434 	iowrite8((u8) idx, ioaddr + CamAddr);  in rhine_set_vlan_cam()
1440 	iowrite8(CAMC_CAMWR | CAMC_CAMEN, ioaddr + CamCon);  in rhine_set_vlan_cam()
1443 	iowrite8(0, ioaddr + CamCon);  in rhine_set_vlan_cam()
1455 	iowrite8(CAMC_CAMEN, ioaddr + CamCon);  in rhine_set_cam_mask()
1462 	iowrite8(0, ioaddr + CamCon);  in rhine_set_cam_mask()
1474 	iowrite8(CAMC_CAMEN | CAMC_VCAMSL, ioaddr + CamCon);  in rhine_set_vlan_cam_mask()
1481 	iowrite8(0, ioaddr + CamCon);  in rhine_set_vlan_cam_mask()
1557 		iowrite8(dev->dev_addr[i], ioaddr + StationAddr + i);  in init_registers()
1562 	iowrite8(0x20, ioaddr + TxConfig);  in init_registers()
1588 	iowrite8(0, ioaddr + MIICmd);  in rhine_enable_linkmon()
1589 	iowrite8(MII_BMSR, ioaddr + MIIRegAddr);  in rhine_enable_linkmon()
1590 	iowrite8(0x80, ioaddr + MIICmd);  in rhine_enable_linkmon()
1594 	iowrite8(MII_BMSR | 0x40, ioaddr + MIIRegAddr);  in rhine_enable_linkmon()
1602 	iowrite8(0, ioaddr + MIICmd);  in rhine_disable_linkmon()
1605 		iowrite8(0x01, ioaddr + MIIRegAddr);	// MII_BMSR  in rhine_disable_linkmon()
1611 		iowrite8(0x80, ioaddr + MIICmd);  in rhine_disable_linkmon()
1616 		iowrite8(0, ioaddr + MIICmd);  in rhine_disable_linkmon()
1633 	iowrite8(phy_id, ioaddr + MIIPhyAddr);  in mdio_read()
1634 	iowrite8(regnum, ioaddr + MIIRegAddr);  in mdio_read()
1635 	iowrite8(0x40, ioaddr + MIICmd);		/* Trigger read */  in mdio_read()
1651 	iowrite8(phy_id, ioaddr + MIIPhyAddr);  in mdio_write()
1652 	iowrite8(regnum, ioaddr + MIIRegAddr);  in mdio_write()
1654 	iowrite8(0x20, ioaddr + MIICmd);		/* Trigger write */  in mdio_write()
1861 	iowrite8(ioread8(ioaddr + ChipCmd1) | Cmd1TxDemand,  in rhine_start_tx()
2164 		iowrite8(ioread8(ioaddr + ChipCmd) | CmdTxOn,  in rhine_restart_tx()
2171 		iowrite8(ioread8(ioaddr + ChipCmd1) | Cmd1TxDemand,  in rhine_restart_tx()
2419 	iowrite8(rp->tx_thresh | 0x02, ioaddr + TxConfig);  in rhine_close()
2476 		iowrite8(0x04, ioaddr + WOLcgClr);  in rhine_shutdown_pci()
2481 		iowrite8(WOLmagic, ioaddr + WOLcrSet);  in rhine_shutdown_pci()
2486 		iowrite8(ioread8(ioaddr + ConfigA) | 0x03, ioaddr + ConfigA);  in rhine_shutdown_pci()
2490 		iowrite8(WOLbmcast, ioaddr + WOLcgSet);  in rhine_shutdown_pci()
2493 		iowrite8(WOLlnkon | WOLlnkoff, ioaddr + WOLcrSet);  in rhine_shutdown_pci()
2496 		iowrite8(WOLucast, ioaddr + WOLcrSet);  in rhine_shutdown_pci()
2500 		iowrite8(0x01, ioaddr + PwcfgSet);  in rhine_shutdown_pci()
2501 		iowrite8(ioread8(ioaddr + StickyHW) | 0x04, ioaddr + StickyHW);  in rhine_shutdown_pci()
2507 		iowrite8(ioread8(ioaddr + StickyHW) | 0x03, ioaddr + StickyHW);  in rhine_shutdown_pci()