56 static void writeq(u64 val, void __iomem *reg)  in writeq()
73 #define nw64(reg, val)		writeq((val), np->regs + (reg))  argument
76 #define nw64_mac(reg, val)	writeq((val), np->mac_regs + (reg))  argument
79 #define nw64_ipp(reg, val)	writeq((val), np->regs + np->ipp_off + (reg))  argument
82 #define nw64_pcs(reg, val)	writeq((val), np->regs + np->pcs_off + (reg))  argument
85 #define nw64_xpcs(reg, val)	writeq((val), np->regs + np->xpcs_off + (reg))  argument
105 		u64 val = nr64_mac(reg);  in __niu_wait_bits_clear_mac()  local
140 		u64 val = nr64_ipp(reg);  in __niu_wait_bits_clear_ipp()  local
156 	u64 val;  in __niu_set_and_wait_clear_ipp()  local
179 		u64 val = nr64(reg);  in __niu_wait_bits_clear()  local
217 	u64 val = (u64) lp->timer;  in niu_ldg_rearm()  local
228 	u64 val;  in niu_ldn_irq_enable()  local
292 static u32 phy_decode(u32 val, int port)  in phy_decode()
300 	u64 val;  in mdio_wait()  local
361 static int esr2_set_tx_cfg(struct niu *np, unsigned long channel, u32 val)  in esr2_set_tx_cfg()
375 static int esr2_set_rx_cfg(struct niu *np, unsigned long channel, u32 val)  in esr2_set_rx_cfg()
432 	u64 sig, mask, val;  in serdes_init_niu_1g_serdes()  local
529 	u64 sig, mask, val;  in serdes_init_niu_10g_serdes()  local
639 static int esr_read_rxtx_ctrl(struct niu *np, unsigned long chan, u32 *val)  in esr_read_rxtx_ctrl()
655 static int esr_read_glue0(struct niu *np, unsigned long chan, u32 *val)  in esr_read_glue0()
673 static int esr_read_reset(struct niu *np, u32 *val)  in esr_read_reset()
691 static int esr_write_rxtx_ctrl(struct niu *np, unsigned long chan, u32 val)  in esr_write_rxtx_ctrl()
703 static int esr_write_glue0(struct niu *np, unsigned long chan, u32 val)  in esr_write_glue0()
758 	u64 ctrl_val, test_cfg_val, sig, mask, val;  in serdes_init_10g()  local
882 	u64 val;  in serdes_init_1g()  local
911 	u64 ctrl_val, test_cfg_val, sig, mask, val;  in serdes_init_1g_serdes()  local
1032 	u64 val;  in link_status_1g_serdes()  local
1065 	u64 val, val2;  in link_status_10g_serdes()  local
1374 static int mrvl88x2011_act_led(struct niu *np, int val)  in mrvl88x2011_act_led()
1538 	u64 val;  in xcvr_init_10g_bcm8706()  local
1598 	u64 val;  in xcvr_init_10g()  local
1656 	u64 val;  in xcvr_init_1g_rgmii()  local
1850 	u64 val;  in xcvr_init_1g()  local
2106 	u64 sig, mask, val;  in niu_10g_phy_present()  local
2354 	u64 ctrl_val, test_cfg_val, sig, mask, val;  in serdes_init_10g_serdes()  local
2656 	u64 val, mask;  in niu_enable_alt_mac()  local
2682 	u64 val = nr64_mac(reg);  in __set_rdc_table_num_hw()  local
2859 	u64 val = nr64(FFLP_CFG_1);  in tcam_enable()  local
2870 	u64 val = nr64(FFLP_CFG_1);  in tcam_set_lat_and_ratio()  local
2888 	u64 val;  in tcam_user_eth_class_enable()  local
2931 	u64 val;  in tcam_user_ip_class_enable()  local
2953 	u64 val;  in tcam_user_ip_class_set()  local
3040 	u64 val = hash_addr_regval(index, num_entries);  in hash_write()  local
3056 	u64 val;  in fflp_reset()  local
3068 	u64 val = nr64(FFLP_CFG_1);  in fflp_set_timings()  local
3089 	u64 val;  in fflp_set_partition()  local
3123 	u64 val = nr64(FFLP_CFG_1);  in fflp_llcsnap_enable()  local
3134 	u64 val = nr64(FFLP_CFG_1);  in fflp_errors_enable()  local
3372 		u64 addr, val;  in niu_rx_pkt_ignore()  local
3420 		u64 addr, val, off;  in niu_process_rx_pkt()  local
3903 	u64 val;  in niu_xmac_interrupt()  local
3973 	u64 val;  in niu_bmac_interrupt()  local
4544 		u64 val = nr64(TX_CS(channel));  in niu_tx_cs_sng_poll()  local
4553 	u64 val = nr64(TX_CS(channel));  in niu_tx_channel_stop()  local
4566 		u64 val = nr64(TX_CS(channel));  in niu_tx_cs_reset_poll()  local
4575 	u64 val = nr64(TX_CS(channel));  in niu_tx_channel_reset()  local
4590 	u64 val;  in niu_tx_channel_lpage_init()  local
4612 	u64 val, mask;  in niu_txc_enable_port()  local
4631 	u64 val;  in niu_txc_set_imask()  local
4642 	u64 val = 0;  in niu_txc_port_dma_enable()  local
4656 	u64 val, ring_len;  in niu_init_one_tx_channel()  local
4728 	u64 val;  in niu_init_drr_weight()  local
4776 	u64 val;  in niu_rx_channel_lpage_init()  local
4795 	u64 val;  in niu_rx_channel_wred_init()  local
4806 	u64 val = 0;  in niu_compute_rbr_cfig_b()  local
4886 	u64 val = nr64(RXDMA_CFIG1(channel));  in niu_enable_rx_channel()  local
4909 	u64 val;  in niu_init_one_rx_channel()  local
5122 	u64 val = nr64(RESET_CFIFO);  in niu_zcp_cfifo_reset()  local
5171 	u64 val = nr64_ipp(IPP_CFIG);  in niu_ipp_write()  local
5201 	u64 data[5], rbuf[5], val;  in niu_init_ipp()  local
5252 	u64 val;  in niu_handle_led()  local
5272 	u64 val;  in niu_init_xif_xmac()  local
5329 	u64 val;  in niu_init_xif_bmac()  local
5367 	u64 val = nr64_pcs(PCS_MII_CTL);  in niu_pcs_mii_reset()  local
5379 	u64 val = nr64_xpcs(XPCS_CONTROL1);  in niu_xpcs_reset()  local
5391 	u64 val;  in niu_init_pcs()  local
5491 	u64 val;  in niu_init_tx_xmac()  local
5527 	u64 val;  in niu_init_tx_bmac()  local
5621 	u64 val;  in niu_init_rx_xmac()  local
5673 	u64 val;  in niu_init_rx_bmac()  local
5714 	u64 val = nr64_mac(XMAC_CONFIG);  in niu_enable_tx_xmac()  local
5725 	u64 val = nr64_mac(BTXMAC_CONFIG);  in niu_enable_tx_bmac()  local
5744 	u64 val = nr64_mac(XMAC_CONFIG);  in niu_enable_rx_xmac()  local
5763 	u64 val = nr64_mac(BRXMAC_CONFIG);  in niu_enable_rx_bmac()  local
5890 	u64 rd, wr, val;  in niu_disable_ipp()  local
6552 		__be16 val = vp->h_vlan_encapsulated_proto;  in niu_compute_tx_flags()  local
6861 	u32 offset, len, val;  in niu_get_eeprom()  local
7820 static void niu_led_state_restore(struct niu *np, u64 val)  in niu_led_state_restore()
7830 	u64 val, reg, bit;  in niu_force_led()  local
7992 	u16 val;  in niu_pci_eeprom_read16()  local
8008 	u16 val;  in niu_pci_eeprom_read16_swp()  local
8359 	u64 val, sum;  in niu_pci_probe_sprom()  local
8794 	u32 val;  in walk_phys()  local