186 #define ew32(reg, val)	iowrite32(val, ioaddr + (reg))  macro
405 	ew32(GENCTL, 0x4200);  in epic_init_one()
409 		ew32(TEST1, 0x0008);  in epic_init_one()
412 	ew32(MIICfg, 0x12);  in epic_init_one()
414 		ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);  in epic_init_one()
415 	ew32(GENCTL, 0x0200);  in epic_init_one()
469 		ew32(NVCTL, er32(NVCTL) & ~0x483c);  in epic_init_one()
470 	ew32(GENCTL, 0x0008);  in epic_init_one()
541 	ew32(INTMASK, 0x00000000);  in epic_disable_int()
556 	ew32(INTMASK, ep->irq_mask & ~EpicNapiEvent);  in epic_napi_irq_off()
566 	ew32(INTMASK, ep->irq_mask | EpicNapiEvent);  in epic_napi_irq_on()
577 	ew32(EECTL, EE_ENB & ~EE_CS);  in read_eeprom()
578 	ew32(EECTL, EE_ENB);  in read_eeprom()
583 		ew32(EECTL, EE_ENB | dataval);  in read_eeprom()
585 		ew32(EECTL, EE_ENB | dataval | EE_SHIFT_CLK);  in read_eeprom()
588 	ew32(EECTL, EE_ENB);  in read_eeprom()
591 		ew32(EECTL, EE_ENB | EE_SHIFT_CLK);  in read_eeprom()
594 		ew32(EECTL, EE_ENB);  in read_eeprom()
599 	ew32(EECTL, EE_ENB & ~EE_CS);  in read_eeprom()
612 	ew32(MIICtrl, read_cmd);  in mdio_read()
620 				ew32(MIICtrl, read_cmd);  in mdio_read()
636 	ew32(MIICtrl, (phy_id << 9) | (loc << 4) | MII_WRITEOP);  in mdio_write()
653 	ew32(GENCTL, 0x4001);  in epic_open()
664 	ew32(GENCTL, 0x4000);  in epic_open()
667 		ew32(TEST1, 0x0008);  in epic_open()
675 	ew32(MIICfg, dev->if_port == 1 ? 0x13 : 0x12);  in epic_open()
678 		ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);  in epic_open()
682 	ew32(GENCTL, 0x4432 | (RX_FIFO_THRESH << 8));  in epic_open()
684 	ew32(GENCTL, 0x0432 | (RX_FIFO_THRESH << 8));  in epic_open()
686 	ew32(GENCTL, 0x4412 | (RX_FIFO_THRESH << 8));  in epic_open()
688 	ew32(GENCTL, 0x0412 | (RX_FIFO_THRESH << 8));  in epic_open()
694 		ew32(LAN0 + i*4, le16_to_cpu(((__le16*)dev->dev_addr)[i]));  in epic_open()
697 	ew32(TxThresh, ep->tx_threshold);  in epic_open()
722 	ew32(TxCtrl, ep->mii.full_duplex ? 0x7f : 0x79);  in epic_open()
723 	ew32(PRxCDAR, ep->rx_ring_dma);  in epic_open()
724 	ew32(PTxCDAR, ep->tx_ring_dma);  in epic_open()
728 	ew32(COMMAND, StartRx | RxQueued);  in epic_open()
733 	ew32(INTMASK, RxError | RxHeader | EpicNapiEvent | CntFull |  in epic_open()
763 	ew32(INTMASK, 0x00000000);  in epic_pause()
785 	ew32(GENCTL, 0x4001);  in epic_restart()
793 		ew32(TEST1, 0x0008);  in epic_restart()
796 	ew32(GENCTL, 0x0432 | (RX_FIFO_THRESH << 8));  in epic_restart()
798 	ew32(GENCTL, 0x0412 | (RX_FIFO_THRESH << 8));  in epic_restart()
800 	ew32(MIICfg, dev->if_port == 1 ? 0x13 : 0x12);  in epic_restart()
802 		ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);  in epic_restart()
805 		ew32(LAN0 + i*4, le16_to_cpu(((__le16*)dev->dev_addr)[i]));  in epic_restart()
808 	ew32(TxThresh, ep->tx_threshold);  in epic_restart()
809 	ew32(TxCtrl, ep->mii.full_duplex ? 0x7f : 0x79);  in epic_restart()
810 	ew32(PRxCDAR, ep->rx_ring_dma +  in epic_restart()
812 	ew32(PTxCDAR, ep->tx_ring_dma +  in epic_restart()
817 	ew32(COMMAND, StartRx | RxQueued);  in epic_restart()
820 	ew32(INTMASK, RxError | RxHeader | EpicNapiEvent | CntFull |  in epic_restart()
845 		ew32(TxCtrl, ep->mii.full_duplex ? 0x7F : 0x79);  in check_media()
884 		ew32(COMMAND, RestartTx);  in epic_tx_timeout()
887 		ew32(COMMAND, TxQueued);  in epic_tx_timeout()
989 	ew32(COMMAND, TxQueued);  in epic_start_xmit()
1080 	ew32(INTSTAT, status & EpicNormalEvent);  in epic_interrupt()
1116 			ew32(TxThresh, ep->tx_threshold += 128);  in epic_interrupt()
1118 			ew32(COMMAND, RestartTx);  in epic_interrupt()
1127 		ew32(INTSTAT, status & 0x7f18);  in epic_interrupt()
1270 		ew32(INTSTAT, EpicNapiEvent);  in epic_poll()
1325 	ew32(GENCTL, 0x0008);  in epic_close()
1359 		ew32(RxCtrl, 0x002c);  in set_rx_mode()
1367 		ew32(RxCtrl, 0x000c);  in set_rx_mode()
1369 		ew32(RxCtrl, 0x0004);  in set_rx_mode()
1454 		ew32(GENCTL, 0x0200);  in ethtool_begin()
1455 		ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);  in ethtool_begin()
1467 		ew32(GENCTL, 0x0008);  in ethtool_complete()
1468 		ew32(NVCTL, (er32(NVCTL) & ~0x483c) | 0x0000);  in ethtool_complete()
1493 		ew32(GENCTL, 0x0200);  in netdev_ioctl()
1494 		ew32(NVCTL, (er32(NVCTL) & ~0x003c) | 0x4800);  in netdev_ioctl()
1504 		ew32(GENCTL, 0x0008);  in netdev_ioctl()
1505 		ew32(NVCTL, (er32(NVCTL) & ~0x483c) | 0x0000);  in netdev_ioctl()
1538 	ew32(GENCTL, 0x0008);  in epic_suspend()