284 static int mlxsw_pci_sdq_init(struct mlxsw_pci *mlxsw_pci, char *mbox,  in mlxsw_pci_sdq_init()  argument
300 	mlxsw_cmd_mbox_sw2hw_dq_cq_set(mbox, q->num);  in mlxsw_pci_sdq_init()
301 	mlxsw_cmd_mbox_sw2hw_dq_sdq_lp_set(mbox, lp);  in mlxsw_pci_sdq_init()
302 	mlxsw_cmd_mbox_sw2hw_dq_sdq_tclass_set(mbox, tclass);  in mlxsw_pci_sdq_init()
303 	mlxsw_cmd_mbox_sw2hw_dq_log2_dq_sz_set(mbox, 3); /* 8 pages */  in mlxsw_pci_sdq_init()
307 		mlxsw_cmd_mbox_sw2hw_dq_pa_set(mbox, i, mapaddr);  in mlxsw_pci_sdq_init()
310 	err = mlxsw_cmd_sw2hw_sdq(mlxsw_pci->core, mbox, q->num);  in mlxsw_pci_sdq_init()
390 static int mlxsw_pci_rdq_init(struct mlxsw_pci *mlxsw_pci, char *mbox,  in mlxsw_pci_rdq_init()  argument
404 	mlxsw_cmd_mbox_sw2hw_dq_cq_set(mbox, sdq_count + q->num);  in mlxsw_pci_rdq_init()
405 	mlxsw_cmd_mbox_sw2hw_dq_log2_dq_sz_set(mbox, 3); /* 8 pages */  in mlxsw_pci_rdq_init()
409 		mlxsw_cmd_mbox_sw2hw_dq_pa_set(mbox, i, mapaddr);  in mlxsw_pci_rdq_init()
412 	err = mlxsw_cmd_sw2hw_rdq(mlxsw_pci->core, mbox, q->num);  in mlxsw_pci_rdq_init()
465 static int mlxsw_pci_cq_init(struct mlxsw_pci *mlxsw_pci, char *mbox,  in mlxsw_pci_cq_init()  argument
480 		mlxsw_cmd_mbox_sw2hw_cq_cqe_ver_set(mbox,  in mlxsw_pci_cq_init()
483 		mlxsw_cmd_mbox_sw2hw_cq_cqe_ver_set(mbox,  in mlxsw_pci_cq_init()
486 	mlxsw_cmd_mbox_sw2hw_cq_c_eqn_set(mbox, MLXSW_PCI_EQ_COMP_NUM);  in mlxsw_pci_cq_init()
487 	mlxsw_cmd_mbox_sw2hw_cq_st_set(mbox, 0);  in mlxsw_pci_cq_init()
488 	mlxsw_cmd_mbox_sw2hw_cq_log_cq_size_set(mbox, ilog2(q->count));  in mlxsw_pci_cq_init()
492 		mlxsw_cmd_mbox_sw2hw_cq_pa_set(mbox, i, mapaddr);  in mlxsw_pci_cq_init()
494 	err = mlxsw_cmd_sw2hw_cq(mlxsw_pci->core, mbox, q->num);  in mlxsw_pci_cq_init()
677 static int mlxsw_pci_eq_init(struct mlxsw_pci *mlxsw_pci, char *mbox,  in mlxsw_pci_eq_init()  argument
691 	mlxsw_cmd_mbox_sw2hw_eq_int_msix_set(mbox, 1); /* MSI-X used */  in mlxsw_pci_eq_init()
692 	mlxsw_cmd_mbox_sw2hw_eq_st_set(mbox, 1); /* armed */  in mlxsw_pci_eq_init()
693 	mlxsw_cmd_mbox_sw2hw_eq_log_eq_size_set(mbox, ilog2(q->count));  in mlxsw_pci_eq_init()
697 		mlxsw_cmd_mbox_sw2hw_eq_pa_set(mbox, i, mapaddr);  in mlxsw_pci_eq_init()
699 	err = mlxsw_cmd_sw2hw_eq(mlxsw_pci->core, mbox, q->num);  in mlxsw_pci_eq_init()
794 	int (*init)(struct mlxsw_pci *mlxsw_pci, char *mbox,
840 static int mlxsw_pci_queue_init(struct mlxsw_pci *mlxsw_pci, char *mbox,  in mlxsw_pci_queue_init()  argument
887 	mlxsw_cmd_mbox_zero(mbox);  in mlxsw_pci_queue_init()
888 	err = q_ops->init(mlxsw_pci, mbox, q);  in mlxsw_pci_queue_init()
913 static int mlxsw_pci_queue_group_init(struct mlxsw_pci *mlxsw_pci, char *mbox,  in mlxsw_pci_queue_group_init()  argument
927 		err = mlxsw_pci_queue_init(mlxsw_pci, mbox, q_ops,  in mlxsw_pci_queue_group_init()
955 static int mlxsw_pci_aqs_init(struct mlxsw_pci *mlxsw_pci, char *mbox)  in mlxsw_pci_aqs_init()  argument
969 	mlxsw_cmd_mbox_zero(mbox);  in mlxsw_pci_aqs_init()
970 	err = mlxsw_cmd_query_aq_cap(mlxsw_pci->core, mbox);  in mlxsw_pci_aqs_init()
974 	num_sdqs = mlxsw_cmd_mbox_query_aq_cap_max_num_sdqs_get(mbox);  in mlxsw_pci_aqs_init()
975 	sdq_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_sdq_sz_get(mbox);  in mlxsw_pci_aqs_init()
976 	num_rdqs = mlxsw_cmd_mbox_query_aq_cap_max_num_rdqs_get(mbox);  in mlxsw_pci_aqs_init()
977 	rdq_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_rdq_sz_get(mbox);  in mlxsw_pci_aqs_init()
978 	num_cqs = mlxsw_cmd_mbox_query_aq_cap_max_num_cqs_get(mbox);  in mlxsw_pci_aqs_init()
979 	cq_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_cq_sz_get(mbox);  in mlxsw_pci_aqs_init()
980 	cqv2_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_cqv2_sz_get(mbox);  in mlxsw_pci_aqs_init()
981 	num_eqs = mlxsw_cmd_mbox_query_aq_cap_max_num_eqs_get(mbox);  in mlxsw_pci_aqs_init()
982 	eq_log2sz = mlxsw_cmd_mbox_query_aq_cap_log_max_eq_sz_get(mbox);  in mlxsw_pci_aqs_init()
1003 	err = mlxsw_pci_queue_group_init(mlxsw_pci, mbox, &mlxsw_pci_eq_ops,  in mlxsw_pci_aqs_init()
1010 	err = mlxsw_pci_queue_group_init(mlxsw_pci, mbox, &mlxsw_pci_cq_ops,  in mlxsw_pci_aqs_init()
1017 	err = mlxsw_pci_queue_group_init(mlxsw_pci, mbox, &mlxsw_pci_sdq_ops,  in mlxsw_pci_aqs_init()
1024 	err = mlxsw_pci_queue_group_init(mlxsw_pci, mbox, &mlxsw_pci_rdq_ops,  in mlxsw_pci_aqs_init()
1055 				     char *mbox, int index,  in mlxsw_pci_config_profile_swid_config()  argument
1062 			mbox, index, swid->type);  in mlxsw_pci_config_profile_swid_config()
1067 			mbox, index, swid->properties);  in mlxsw_pci_config_profile_swid_config()
1070 	mlxsw_cmd_mbox_config_profile_swid_config_mask_set(mbox, index, mask);  in mlxsw_pci_config_profile_swid_config()
1094 static int mlxsw_pci_config_profile(struct mlxsw_pci *mlxsw_pci, char *mbox,  in mlxsw_pci_config_profile()  argument
1101 	mlxsw_cmd_mbox_zero(mbox);  in mlxsw_pci_config_profile()
1105 			mbox, 1);  in mlxsw_pci_config_profile()
1107 			mbox, profile->max_vepa_channels);  in mlxsw_pci_config_profile()
1111 			mbox, 1);  in mlxsw_pci_config_profile()
1113 			mbox, profile->max_mid);  in mlxsw_pci_config_profile()
1117 			mbox, 1);  in mlxsw_pci_config_profile()
1119 			mbox, profile->max_pgt);  in mlxsw_pci_config_profile()
1123 			mbox, 1);  in mlxsw_pci_config_profile()
1125 			mbox, profile->max_system_port);  in mlxsw_pci_config_profile()
1129 			mbox, 1);  in mlxsw_pci_config_profile()
1131 			mbox, profile->max_vlan_groups);  in mlxsw_pci_config_profile()
1135 			mbox, 1);  in mlxsw_pci_config_profile()
1137 			mbox, profile->max_regions);  in mlxsw_pci_config_profile()
1141 			mbox, 1);  in mlxsw_pci_config_profile()
1143 			mbox, profile->max_flood_tables);  in mlxsw_pci_config_profile()
1145 			mbox, profile->max_vid_flood_tables);  in mlxsw_pci_config_profile()
1147 			mbox, profile->max_fid_offset_flood_tables);  in mlxsw_pci_config_profile()
1149 			mbox, profile->fid_offset_flood_table_size);  in mlxsw_pci_config_profile()
1151 			mbox, profile->max_fid_flood_tables);  in mlxsw_pci_config_profile()
1153 			mbox, profile->fid_flood_table_size);  in mlxsw_pci_config_profile()
1157 			mbox, 1);  in mlxsw_pci_config_profile()
1159 			mbox, profile->flood_mode);  in mlxsw_pci_config_profile()
1163 			mbox, 1);  in mlxsw_pci_config_profile()
1165 			mbox, profile->max_ib_mc);  in mlxsw_pci_config_profile()
1169 			mbox, 1);  in mlxsw_pci_config_profile()
1171 			mbox, profile->max_pkey);  in mlxsw_pci_config_profile()
1175 			mbox, 1);  in mlxsw_pci_config_profile()
1177 			mbox, profile->ar_sec);  in mlxsw_pci_config_profile()
1181 			mbox, 1);  in mlxsw_pci_config_profile()
1183 			mbox, profile->adaptive_routing_group_cap);  in mlxsw_pci_config_profile()
1190 		mlxsw_cmd_mbox_config_profile_set_kvd_linear_size_set(mbox, 1);  in mlxsw_pci_config_profile()
1191 		mlxsw_cmd_mbox_config_profile_kvd_linear_size_set(mbox,  in mlxsw_pci_config_profile()
1193 		mlxsw_cmd_mbox_config_profile_set_kvd_hash_single_size_set(mbox,  in mlxsw_pci_config_profile()
1195 		mlxsw_cmd_mbox_config_profile_kvd_hash_single_size_set(mbox,  in mlxsw_pci_config_profile()
1198 								mbox, 1);  in mlxsw_pci_config_profile()
1199 		mlxsw_cmd_mbox_config_profile_kvd_hash_double_size_set(mbox,  in mlxsw_pci_config_profile()
1204 		mlxsw_pci_config_profile_swid_config(mlxsw_pci, mbox, i,  in mlxsw_pci_config_profile()
1208 		mlxsw_cmd_mbox_config_profile_set_cqe_version_set(mbox, 1);  in mlxsw_pci_config_profile()
1209 		mlxsw_cmd_mbox_config_profile_cqe_version_set(mbox, 1);  in mlxsw_pci_config_profile()
1212 	return mlxsw_cmd_config_profile_set(mlxsw_pci->core, mbox);  in mlxsw_pci_config_profile()
1215 static int mlxsw_pci_boardinfo(struct mlxsw_pci *mlxsw_pci, char *mbox)  in mlxsw_pci_boardinfo()  argument
1220 	mlxsw_cmd_mbox_zero(mbox);  in mlxsw_pci_boardinfo()
1221 	err = mlxsw_cmd_boardinfo(mlxsw_pci->core, mbox);  in mlxsw_pci_boardinfo()
1224 	mlxsw_cmd_mbox_boardinfo_vsd_memcpy_from(mbox, bus_info->vsd);  in mlxsw_pci_boardinfo()
1225 	mlxsw_cmd_mbox_boardinfo_psid_memcpy_from(mbox, bus_info->psid);  in mlxsw_pci_boardinfo()
1229 static int mlxsw_pci_fw_area_init(struct mlxsw_pci *mlxsw_pci, char *mbox,  in mlxsw_pci_fw_area_init()  argument
1243 	mlxsw_cmd_mbox_zero(mbox);  in mlxsw_pci_fw_area_init()
1255 		mlxsw_cmd_mbox_map_fa_pa_set(mbox, nent, mem_item->mapaddr);  in mlxsw_pci_fw_area_init()
1256 		mlxsw_cmd_mbox_map_fa_log2size_set(mbox, nent, 0); /* 1 page */  in mlxsw_pci_fw_area_init()
1258 			err = mlxsw_cmd_map_fa(mlxsw_pci->core, mbox, nent);  in mlxsw_pci_fw_area_init()
1262 			mlxsw_cmd_mbox_zero(mbox);  in mlxsw_pci_fw_area_init()
1267 		err = mlxsw_cmd_map_fa(mlxsw_pci->core, mbox, nent);  in mlxsw_pci_fw_area_init()
1316 				struct mlxsw_pci_mem_item *mbox)  in mlxsw_pci_mbox_alloc()  argument
1321 	mbox->size = MLXSW_CMD_MBOX_SIZE;  in mlxsw_pci_mbox_alloc()
1322 	mbox->buf = pci_alloc_consistent(pdev, MLXSW_CMD_MBOX_SIZE,  in mlxsw_pci_mbox_alloc()
1323 					 &mbox->mapaddr);  in mlxsw_pci_mbox_alloc()
1324 	if (!mbox->buf) {  in mlxsw_pci_mbox_alloc()
1333 				struct mlxsw_pci_mem_item *mbox)  in mlxsw_pci_mbox_free()  argument
1337 	pci_free_consistent(pdev, MLXSW_CMD_MBOX_SIZE, mbox->buf,  in mlxsw_pci_mbox_free()
1338 			    mbox->mapaddr);  in mlxsw_pci_mbox_free()
1420 	char *mbox;  in mlxsw_pci_init()  local
1426 	mbox = mlxsw_cmd_mbox_alloc();  in mlxsw_pci_init()
1427 	if (!mbox)  in mlxsw_pci_init()
1440 	err = mlxsw_cmd_query_fw(mlxsw_core, mbox);  in mlxsw_pci_init()
1445 		mlxsw_cmd_mbox_query_fw_fw_rev_major_get(mbox);  in mlxsw_pci_init()
1447 		mlxsw_cmd_mbox_query_fw_fw_rev_minor_get(mbox);  in mlxsw_pci_init()
1449 		mlxsw_cmd_mbox_query_fw_fw_rev_subminor_get(mbox);  in mlxsw_pci_init()
1451 	if (mlxsw_cmd_mbox_query_fw_cmd_interface_rev_get(mbox) != 1) {  in mlxsw_pci_init()
1456 	if (mlxsw_cmd_mbox_query_fw_doorbell_page_bar_get(mbox) != 0) {  in mlxsw_pci_init()
1463 		mlxsw_cmd_mbox_query_fw_doorbell_page_offset_get(mbox);  in mlxsw_pci_init()
1465 	if (mlxsw_cmd_mbox_query_fw_fr_rn_clk_bar_get(mbox) != 0) {  in mlxsw_pci_init()
1472 		mlxsw_cmd_mbox_query_fw_free_running_clock_offset_get(mbox);  in mlxsw_pci_init()
1474 	num_pages = mlxsw_cmd_mbox_query_fw_fw_pages_get(mbox);  in mlxsw_pci_init()
1475 	err = mlxsw_pci_fw_area_init(mlxsw_pci, mbox, num_pages);  in mlxsw_pci_init()
1479 	err = mlxsw_pci_boardinfo(mlxsw_pci, mbox);  in mlxsw_pci_init()
1483 	err = mlxsw_core_resources_query(mlxsw_core, mbox, res);  in mlxsw_pci_init()
1502 	err = mlxsw_pci_config_profile(mlxsw_pci, mbox, profile, res);  in mlxsw_pci_init()
1506 	err = mlxsw_pci_aqs_init(mlxsw_pci, mbox);  in mlxsw_pci_init()
1537 	mlxsw_cmd_mbox_free(mbox);  in mlxsw_pci_init()