Lines Matching refs:ew32
613 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_update_rdt_wa()
630 ew32(TCTL, tctl & ~E1000_TCTL_EN); in e1000e_update_tdt_wa()
1104 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1110 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000_print_hw_hang()
1782 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr_msi()
1862 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_intr()
1906 ew32(ICS, (icr & adapter->eiac_mask)); in e1000_msix_other()
1916 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK); in e1000_msix_other()
1933 ew32(ICS, tx_ring->ims_val); in e1000_intr_msix_tx()
1936 ew32(IMS, adapter->tx_ring->ims_val); in e1000_intr_msix_tx()
1988 ew32(RFCTL, rfctl); in e1000_configure_msix()
2024 ew32(IVAR, ivar); in e1000_configure_msix()
2029 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_msix()
2224 ew32(IMC, ~0); in e1000_irq_disable()
2226 ew32(EIAC_82574, 0); in e1000_irq_disable()
2248 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574); in e1000_irq_enable()
2249 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | in e1000_irq_enable()
2252 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER); in e1000_irq_enable()
2254 ew32(IMS, IMS_ENABLE_MASK); in e1000_irq_enable()
2277 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD); in e1000e_get_hw_control()
2280 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); in e1000e_get_hw_control()
2303 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD); in e1000e_release_hw_control()
2306 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); in e1000e_release_hw_control()
2630 ew32(ITR, new_itr); in e1000e_write_itr()
2694 ew32(IMS, adapter->rx_ring->ims_val); in e1000e_poll()
2771 ew32(RCTL, rctl); in e1000e_vlan_filter_disable()
2795 ew32(RCTL, rctl); in e1000e_vlan_filter_enable()
2811 ew32(CTRL, ctrl); in e1000e_vlan_strip_disable()
2826 ew32(CTRL, ctrl); in e1000e_vlan_strip_enable()
2900 ew32(MDEF(i), (E1000_MDEF_PORT_623 | in e1000_init_manageability_pt()
2912 ew32(MANC2H, manc2h); in e1000_init_manageability_pt()
2913 ew32(MANC, manc); in e1000_init_manageability_pt()
2932 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32))); in e1000_configure_tx()
2933 ew32(TDBAH(0), (tdba >> 32)); in e1000_configure_tx()
2934 ew32(TDLEN(0), tdlen); in e1000_configure_tx()
2935 ew32(TDH(0), 0); in e1000_configure_tx()
2936 ew32(TDT(0), 0); in e1000_configure_tx()
2947 ew32(TIDV, adapter->tx_int_delay); in e1000_configure_tx()
2949 ew32(TADV, adapter->tx_abs_int_delay); in e1000_configure_tx()
2966 ew32(TXDCTL(0), txdctl); in e1000_configure_tx()
2969 ew32(TXDCTL(1), er32(TXDCTL(0))); in e1000_configure_tx()
2984 ew32(TARC(0), tarc); in e1000_configure_tx()
2991 ew32(TARC(0), tarc); in e1000_configure_tx()
2994 ew32(TARC(1), tarc); in e1000_configure_tx()
3007 ew32(TCTL, tctl); in e1000_configure_tx()
3017 ew32(IOSFPC, reg_val); in e1000_configure_tx()
3026 ew32(TARC(0), reg_val); in e1000_configure_tx()
3122 ew32(RFCTL, rfctl); in e1000_setup_rctl()
3164 ew32(PSRCTL, psrctl); in e1000_setup_rctl()
3184 ew32(RCTL, rctl); in e1000_setup_rctl()
3221 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_configure_rx()
3234 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3235 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE); in e1000_configure_rx()
3239 ew32(RDTR, adapter->rx_int_delay); in e1000_configure_rx()
3242 ew32(RADV, adapter->rx_abs_int_delay); in e1000_configure_rx()
3249 ew32(IAM, 0xffffffff); in e1000_configure_rx()
3250 ew32(CTRL_EXT, ctrl_ext); in e1000_configure_rx()
3257 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32))); in e1000_configure_rx()
3258 ew32(RDBAH(0), (rdba >> 32)); in e1000_configure_rx()
3259 ew32(RDLEN(0), rdlen); in e1000_configure_rx()
3260 ew32(RDH(0), 0); in e1000_configure_rx()
3261 ew32(RDT(0), 0); in e1000_configure_rx()
3277 ew32(RXCSUM, rxcsum); in e1000_configure_rx()
3290 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8)); in e1000_configure_rx()
3302 ew32(RCTL, rctl); in e1000_configure_rx()
3392 ew32(RAH(rar_entries), 0); in e1000e_write_uc_addr_list()
3393 ew32(RAL(rar_entries), 0); in e1000e_write_uc_addr_list()
3452 ew32(RCTL, rctl); in e1000e_set_rx_mode()
3469 ew32(RSSRK(i), rss_key[i]); in e1000e_setup_rss_hash()
3473 ew32(RETA(i), 0); in e1000e_setup_rss_hash()
3481 ew32(RXCSUM, rxcsum); in e1000e_setup_rss_hash()
3489 ew32(MRQC, mrqc); in e1000e_setup_rss_hash()
3514 ew32(FEXTNVM7, fextnvm7 | BIT(0)); in e1000e_get_base_timinca()
3709 ew32(TSYNCTXCTL, regval); in e1000e_config_hwtstamp()
3720 ew32(TSYNCRXCTL, regval); in e1000e_config_hwtstamp()
3734 ew32(RXMTRL, rxmtrl); in e1000e_config_hwtstamp()
3741 ew32(RXUDP, rxudp); in e1000e_config_hwtstamp()
3821 ew32(TCTL, tctl | E1000_TCTL_EN); in e1000_flush_tx_ring()
3834 ew32(TDT(0), tx_ring->next_to_use); in e1000_flush_tx_ring()
3850 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3863 ew32(RXDCTL(0), rxdctl); in e1000_flush_rx_ring()
3865 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000_flush_rx_ring()
3868 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000_flush_rx_ring()
3892 ew32(FEXTNVM11, fext_nvm11); in e1000_flush_desc_rings()
3934 ew32(TIMINCA, timinca); in e1000e_systim_reset()
3973 ew32(PBA, pba); in e1000e_reset()
4015 ew32(PBA, pba); in e1000e_reset()
4038 ew32(PBA, pba); in e1000e_reset()
4081 ew32(PBA, pba); in e1000e_reset()
4126 ew32(WUC, 0); in e1000e_reset()
4134 ew32(VET, ETH_P_8021Q); in e1000e_reset()
4196 ew32(FEXTNVM7, reg); in e1000e_reset()
4201 ew32(FEXTNVM9, reg); in e1000e_reset()
4217 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER); in e1000e_trigger_lsc()
4219 ew32(ICS, E1000_ICS_LSC); in e1000e_trigger_lsc()
4246 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4247 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4255 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD); in e1000e_flush_descriptors()
4256 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD); in e1000e_flush_descriptors()
4285 ew32(RCTL, rctl & ~E1000_RCTL_EN); in e1000e_down()
4293 ew32(TCTL, tctl); in e1000e_down()
4550 ew32(ICS, E1000_ICS_RXSEQ); in e1000_test_msi_interrupt()
5151 ew32(RCTL, rctl | E1000_RCTL_EN); in e1000e_enable_receives()
5294 ew32(TARC(0), tarc0); in e1000_watchdog_task()
5327 ew32(TCTL, tctl); in e1000_watchdog_task()
5415 ew32(ICS, adapter->rx_ring->ims_val); in e1000_watchdog_task()
5417 ew32(ICS, E1000_ICS_RXDMT0); in e1000_watchdog_task()
6298 ew32(WUFC, wufc); in e1000_init_phy_wakeup()
6299 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME | in e1000_init_phy_wakeup()
6370 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6381 ew32(EXTCNF_CTRL, mac_data); in e1000e_s0ix_entry_flow()
6389 ew32(TDFH, 0); in e1000e_s0ix_entry_flow()
6392 ew32(TDFT, 0); in e1000e_s0ix_entry_flow()
6395 ew32(TDFHS, 0); in e1000e_s0ix_entry_flow()
6398 ew32(TDFTS, 0); in e1000e_s0ix_entry_flow()
6401 ew32(TDFPC, 0); in e1000e_s0ix_entry_flow()
6404 ew32(RDFH, 0); in e1000e_s0ix_entry_flow()
6407 ew32(RDFT, 0); in e1000e_s0ix_entry_flow()
6410 ew32(RDFHS, 0); in e1000e_s0ix_entry_flow()
6413 ew32(RDFTS, 0); in e1000e_s0ix_entry_flow()
6416 ew32(RDFPC, 0); in e1000e_s0ix_entry_flow()
6421 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6427 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_entry_flow()
6432 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6437 ew32(DPGFR, mac_data); in e1000e_s0ix_entry_flow()
6442 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_entry_flow()
6447 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_entry_flow()
6452 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_entry_flow()
6457 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_entry_flow()
6462 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_entry_flow()
6469 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_entry_flow()
6481 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6486 ew32(FEXTNVM7, mac_data); in e1000e_s0ix_exit_flow()
6491 ew32(FEXTNVM8, mac_data); in e1000e_s0ix_exit_flow()
6496 ew32(FEXTNVM6, mac_data); in e1000e_s0ix_exit_flow()
6501 ew32(FEXTNVM9, mac_data); in e1000e_s0ix_exit_flow()
6508 ew32(FEXTNVM12, mac_data); in e1000e_s0ix_exit_flow()
6515 ew32(DPGFR, mac_data); in e1000e_s0ix_exit_flow()
6520 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6525 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6532 ew32(FEXTNVM5, mac_data); in e1000e_s0ix_exit_flow()
6558 ew32(CTRL_EXT, mac_data); in e1000e_s0ix_exit_flow()
6622 ew32(RCTL, rctl); in __e1000_shutdown()
6629 ew32(CTRL, ctrl); in __e1000_shutdown()
6637 ew32(CTRL_EXT, ctrl_ext); in __e1000_shutdown()
6653 ew32(WUFC, wufc); in __e1000_shutdown()
6654 ew32(WUC, E1000_WUC_PME_EN); in __e1000_shutdown()
6657 ew32(WUC, 0); in __e1000_shutdown()
6658 ew32(WUFC, 0); in __e1000_shutdown()
6911 ew32(WUS, ~0); in __e1000_resume()
7158 ew32(WUS, ~0); in e1000_io_slot_reset()