Lines Matching refs:nvm
594 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_init_nvm_params_ich8lan() local
600 nvm->type = e1000_nvm_flash_sw; in e1000_init_nvm_params_ich8lan()
609 nvm->flash_base_addr = 0; in e1000_init_nvm_params_ich8lan()
612 nvm->flash_bank_size = nvm_size / 2; in e1000_init_nvm_params_ich8lan()
614 nvm->flash_bank_size /= sizeof(u16); in e1000_init_nvm_params_ich8lan()
634 nvm->flash_base_addr = sector_base_addr in e1000_init_nvm_params_ich8lan()
640 nvm->flash_bank_size = ((sector_end_addr - sector_base_addr) in e1000_init_nvm_params_ich8lan()
642 nvm->flash_bank_size /= 2; in e1000_init_nvm_params_ich8lan()
644 nvm->flash_bank_size /= sizeof(u16); in e1000_init_nvm_params_ich8lan()
647 nvm->word_size = E1000_ICH8_SHADOW_RAM_WORDS; in e1000_init_nvm_params_ich8lan()
650 for (i = 0; i < nvm->word_size; i++) { in e1000_init_nvm_params_ich8lan()
3164 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_valid_nvm_bank_detect_ich8lan() local
3165 u32 bank1_offset = nvm->flash_bank_size * sizeof(u16); in e1000_valid_nvm_bank_detect_ich8lan()
3177 bank1_offset = nvm->flash_bank_size; in e1000_valid_nvm_bank_detect_ich8lan()
3268 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_read_nvm_spt() local
3277 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || in e1000_read_nvm_spt()
3284 nvm->ops.acquire(hw); in e1000_read_nvm_spt()
3292 act_offset = (bank) ? nvm->flash_bank_size : 0; in e1000_read_nvm_spt()
3340 nvm->ops.release(hw); in e1000_read_nvm_spt()
3361 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_read_nvm_ich8lan() local
3368 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || in e1000_read_nvm_ich8lan()
3375 nvm->ops.acquire(hw); in e1000_read_nvm_ich8lan()
3383 act_offset = (bank) ? nvm->flash_bank_size : 0; in e1000_read_nvm_ich8lan()
3400 nvm->ops.release(hw); in e1000_read_nvm_ich8lan()
3615 hw->nvm.flash_base_addr); in e1000_read_flash_data_ich8lan()
3689 hw->nvm.flash_base_addr); in e1000_read_flash_data32_ich8lan()
3755 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_write_nvm_ich8lan() local
3759 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || in e1000_write_nvm_ich8lan()
3765 nvm->ops.acquire(hw); in e1000_write_nvm_ich8lan()
3772 nvm->ops.release(hw); in e1000_write_nvm_ich8lan()
3790 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_update_nvm_checksum_spt() local
3800 if (nvm->type != e1000_nvm_flash_sw) in e1000_update_nvm_checksum_spt()
3803 nvm->ops.acquire(hw); in e1000_update_nvm_checksum_spt()
3816 new_bank_offset = nvm->flash_bank_size; in e1000_update_nvm_checksum_spt()
3822 old_bank_offset = nvm->flash_bank_size; in e1000_update_nvm_checksum_spt()
3928 nvm->ops.release(hw); in e1000_update_nvm_checksum_spt()
3934 nvm->ops.reload(hw); in e1000_update_nvm_checksum_spt()
3958 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_update_nvm_checksum_ich8lan() local
3968 if (nvm->type != e1000_nvm_flash_sw) in e1000_update_nvm_checksum_ich8lan()
3971 nvm->ops.acquire(hw); in e1000_update_nvm_checksum_ich8lan()
3984 new_bank_offset = nvm->flash_bank_size; in e1000_update_nvm_checksum_ich8lan()
3990 old_bank_offset = nvm->flash_bank_size; in e1000_update_nvm_checksum_ich8lan()
4079 nvm->ops.release(hw); in e1000_update_nvm_checksum_ich8lan()
4085 nvm->ops.reload(hw); in e1000_update_nvm_checksum_ich8lan()
4165 struct e1000_nvm_info *nvm = &hw->nvm; in e1000e_write_protect_nvm_ich8lan() local
4170 nvm->ops.acquire(hw); in e1000e_write_protect_nvm_ich8lan()
4190 nvm->ops.release(hw); in e1000e_write_protect_nvm_ich8lan()
4221 hw->nvm.flash_base_addr); in e1000_write_flash_data_ich8lan()
4307 hw->nvm.flash_base_addr); in e1000_write_flash_data32_ich8lan()
4461 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_erase_flash_bank_ich8lan() local
4466 u32 flash_bank_size = nvm->flash_bank_size * 2; in e1000_erase_flash_bank_ich8lan()
4508 flash_linear_addr = hw->nvm.flash_base_addr; in e1000_erase_flash_bank_ich8lan()
4610 ret_val = hw->nvm.ops.valid_led_default(hw, &data); in e1000_id_led_init_pchlan()