Lines Matching full:hw
97 static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw);
98 static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw);
99 static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);
100 static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
102 static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
104 static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
106 static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
108 static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset,
110 static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw,
112 static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw,
114 static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw,
116 static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);
117 static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw);
118 static s32 e1000_led_on_ich8lan(struct e1000_hw *hw);
119 static s32 e1000_led_off_ich8lan(struct e1000_hw *hw);
120 static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw);
121 static s32 e1000_setup_led_pchlan(struct e1000_hw *hw);
122 static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw);
123 static s32 e1000_led_on_pchlan(struct e1000_hw *hw);
124 static s32 e1000_led_off_pchlan(struct e1000_hw *hw);
125 static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
126 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw);
127 static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw);
128 static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);
129 static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw);
130 static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw);
131 static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw);
132 static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
133 static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
134 static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw);
135 static s32 e1000_k1_workaround_lv(struct e1000_hw *hw);
136 static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate);
137 static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force);
138 static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw);
139 static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state);
141 static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) in __er16flash() argument
143 return readw(hw->flash_address + reg); in __er16flash()
146 static inline u32 __er32flash(struct e1000_hw *hw, unsigned long reg) in __er32flash() argument
148 return readl(hw->flash_address + reg); in __er32flash()
151 static inline void __ew16flash(struct e1000_hw *hw, unsigned long reg, u16 val) in __ew16flash() argument
153 writew(val, hw->flash_address + reg); in __ew16flash()
156 static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val) in __ew32flash() argument
158 writel(val, hw->flash_address + reg); in __ew32flash()
161 #define er16flash(reg) __er16flash(hw, (reg))
162 #define er32flash(reg) __er32flash(hw, (reg))
163 #define ew16flash(reg, val) __ew16flash(hw, (reg), (val))
164 #define ew32flash(reg, val) __ew32flash(hw, (reg), (val))
168 * @hw: pointer to the HW structure
174 * Assumes the sw/fw/hw semaphore is already acquired.
176 static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw) in e1000_phy_is_accessible_pchlan() argument
185 ret_val = e1e_rphy_locked(hw, MII_PHYSID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
190 ret_val = e1e_rphy_locked(hw, MII_PHYSID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
199 if (hw->phy.id) { in e1000_phy_is_accessible_pchlan()
200 if (hw->phy.id == phy_id) in e1000_phy_is_accessible_pchlan()
203 hw->phy.id = phy_id; in e1000_phy_is_accessible_pchlan()
204 hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
211 if (hw->mac.type < e1000_pch_lpt) { in e1000_phy_is_accessible_pchlan()
212 hw->phy.ops.release(hw); in e1000_phy_is_accessible_pchlan()
213 ret_val = e1000_set_mdio_slow_mode_hv(hw); in e1000_phy_is_accessible_pchlan()
215 ret_val = e1000e_get_phy_id(hw); in e1000_phy_is_accessible_pchlan()
216 hw->phy.ops.acquire(hw); in e1000_phy_is_accessible_pchlan()
222 if (hw->mac.type >= e1000_pch_lpt) { in e1000_phy_is_accessible_pchlan()
226 e1e_rphy_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
228 e1e_wphy_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_phy_is_accessible_pchlan()
242 * @hw: pointer to the HW structure
247 static void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw) in e1000_toggle_lanphypc_pch_lpt() argument
268 if (hw->mac.type < e1000_pch_lpt) { in e1000_toggle_lanphypc_pch_lpt()
283 * @hw: pointer to the HW structure
288 static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) in e1000_init_phy_workarounds_pchlan() argument
290 struct e1000_adapter *adapter = hw->adapter; in e1000_init_phy_workarounds_pchlan()
297 e1000_gate_hw_phy_config_ich8lan(hw, true); in e1000_init_phy_workarounds_pchlan()
302 hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_unknown; in e1000_init_phy_workarounds_pchlan()
303 ret_val = e1000_disable_ulp_lpt_lp(hw, true); in e1000_init_phy_workarounds_pchlan()
307 ret_val = hw->phy.ops.acquire(hw); in e1000_init_phy_workarounds_pchlan()
317 switch (hw->mac.type) { in e1000_init_phy_workarounds_pchlan()
324 if (e1000_phy_is_accessible_pchlan(hw)) in e1000_init_phy_workarounds_pchlan()
342 if (e1000_phy_is_accessible_pchlan(hw)) in e1000_init_phy_workarounds_pchlan()
347 if ((hw->mac.type == e1000_pchlan) && in e1000_init_phy_workarounds_pchlan()
351 if (hw->phy.ops.check_reset_block(hw)) { in e1000_init_phy_workarounds_pchlan()
358 e1000_toggle_lanphypc_pch_lpt(hw); in e1000_init_phy_workarounds_pchlan()
359 if (hw->mac.type >= e1000_pch_lpt) { in e1000_init_phy_workarounds_pchlan()
360 if (e1000_phy_is_accessible_pchlan(hw)) in e1000_init_phy_workarounds_pchlan()
370 if (e1000_phy_is_accessible_pchlan(hw)) in e1000_init_phy_workarounds_pchlan()
380 hw->phy.ops.release(hw); in e1000_init_phy_workarounds_pchlan()
384 if (hw->phy.ops.check_reset_block(hw)) { in e1000_init_phy_workarounds_pchlan()
394 ret_val = e1000e_phy_hw_reset_generic(hw); in e1000_init_phy_workarounds_pchlan()
404 ret_val = hw->phy.ops.check_reset_block(hw); in e1000_init_phy_workarounds_pchlan()
411 if ((hw->mac.type == e1000_pch2lan) && in e1000_init_phy_workarounds_pchlan()
414 e1000_gate_hw_phy_config_ich8lan(hw, false); in e1000_init_phy_workarounds_pchlan()
422 * @hw: pointer to the HW structure
426 static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) in e1000_init_phy_params_pchlan() argument
428 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_pchlan()
449 ret_val = e1000_init_phy_workarounds_pchlan(hw); in e1000_init_phy_params_pchlan()
454 switch (hw->mac.type) { in e1000_init_phy_params_pchlan()
456 ret_val = e1000e_get_phy_id(hw); in e1000_init_phy_params_pchlan()
472 ret_val = e1000_set_mdio_slow_mode_hv(hw); in e1000_init_phy_params_pchlan()
475 ret_val = e1000e_get_phy_id(hw); in e1000_init_phy_params_pchlan()
509 * @hw: pointer to the HW structure
513 static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw) in e1000_init_phy_params_ich8lan() argument
515 struct e1000_phy_info *phy = &hw->phy; in e1000_init_phy_params_ich8lan()
528 ret_val = e1000e_determine_phy_address(hw); in e1000_init_phy_params_ich8lan()
532 ret_val = e1000e_determine_phy_address(hw); in e1000_init_phy_params_ich8lan()
543 ret_val = e1000e_get_phy_id(hw); in e1000_init_phy_params_ich8lan()
587 * @hw: pointer to the HW structure
592 static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw) in e1000_init_nvm_params_ich8lan() argument
594 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_init_nvm_params_ich8lan()
595 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_init_nvm_params_ich8lan()
602 if (hw->mac.type >= e1000_pch_spt) { in e1000_init_nvm_params_ich8lan()
616 hw->flash_address = hw->hw_addr + E1000_FLASH_BASE_ADDR; in e1000_init_nvm_params_ich8lan()
619 if (!hw->flash_address) { in e1000_init_nvm_params_ich8lan()
660 * @hw: pointer to the HW structure
665 static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) in e1000_init_mac_params_ich8lan() argument
667 struct e1000_mac_info *mac = &hw->mac; in e1000_init_mac_params_ich8lan()
670 hw->phy.media_type = e1000_media_type_copper; in e1000_init_mac_params_ich8lan()
741 e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw, true); in e1000_init_mac_params_ich8lan()
748 * @hw: pointer to the HW structure
753 * This helper function assumes the SW/FW/HW Semaphore is already acquired.
755 static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address, in __e1000_access_emi_reg_locked() argument
760 ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, address); in __e1000_access_emi_reg_locked()
765 ret_val = e1e_rphy_locked(hw, I82579_EMI_DATA, data); in __e1000_access_emi_reg_locked()
767 ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, *data); in __e1000_access_emi_reg_locked()
774 * @hw: pointer to the HW structure
778 * Assumes the SW/FW/HW Semaphore is already acquired.
780 s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data) in e1000_read_emi_reg_locked() argument
782 return __e1000_access_emi_reg_locked(hw, addr, data, true); in e1000_read_emi_reg_locked()
787 * @hw: pointer to the HW structure
791 * Assumes the SW/FW/HW Semaphore is already acquired.
793 s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data) in e1000_write_emi_reg_locked() argument
795 return __e1000_access_emi_reg_locked(hw, addr, &data, false); in e1000_write_emi_reg_locked()
800 * @hw: pointer to the HW structure
812 s32 e1000_set_eee_pchlan(struct e1000_hw *hw) in e1000_set_eee_pchlan() argument
814 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_set_eee_pchlan()
818 switch (hw->phy.type) { in e1000_set_eee_pchlan()
833 ret_val = hw->phy.ops.acquire(hw); in e1000_set_eee_pchlan()
837 ret_val = e1e_rphy_locked(hw, I82579_LPI_CTRL, &lpi_ctrl); in e1000_set_eee_pchlan()
847 ret_val = e1000_read_emi_reg_locked(hw, lpa, in e1000_set_eee_pchlan()
853 ret_val = e1000_read_emi_reg_locked(hw, adv_addr, &adv); in e1000_set_eee_pchlan()
864 e1e_rphy_locked(hw, MII_LPA, &data); in e1000_set_eee_pchlan()
877 if (hw->phy.type == e1000_phy_82579) { in e1000_set_eee_pchlan()
878 ret_val = e1000_read_emi_reg_locked(hw, I82579_LPI_PLL_SHUT, in e1000_set_eee_pchlan()
884 ret_val = e1000_write_emi_reg_locked(hw, I82579_LPI_PLL_SHUT, in e1000_set_eee_pchlan()
889 ret_val = e1000_read_emi_reg_locked(hw, pcs_status, &data); in e1000_set_eee_pchlan()
893 ret_val = e1e_wphy_locked(hw, I82579_LPI_CTRL, lpi_ctrl); in e1000_set_eee_pchlan()
895 hw->phy.ops.release(hw); in e1000_set_eee_pchlan()
902 * @hw: pointer to the HW structure
911 static s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link) in e1000_k1_workaround_lpt_lp() argument
919 ret_val = hw->phy.ops.acquire(hw); in e1000_k1_workaround_lpt_lp()
924 e1000e_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG, in e1000_k1_workaround_lpt_lp()
930 e1000e_write_kmrn_reg_locked(hw, in e1000_k1_workaround_lpt_lp()
942 e1000e_write_kmrn_reg_locked(hw, in e1000_k1_workaround_lpt_lp()
946 hw->phy.ops.release(hw); in e1000_k1_workaround_lpt_lp()
951 if ((hw->phy.revision > 5) || !link || in e1000_k1_workaround_lpt_lp()
956 ret_val = e1e_rphy(hw, I217_INBAND_CTRL, ®); in e1000_k1_workaround_lpt_lp()
978 ret_val = e1e_wphy(hw, I217_INBAND_CTRL, reg); in e1000_k1_workaround_lpt_lp()
991 * @hw: pointer to the HW structure
1005 static s32 e1000_platform_pm_pch_lpt(struct e1000_hw *hw, bool link) in e1000_platform_pm_pch_lpt() argument
1020 if (!hw->adapter->max_frame_size) { in e1000_platform_pm_pch_lpt()
1025 hw->mac.ops.get_link_up_info(hw, &speed, &duplex); in e1000_platform_pm_pch_lpt()
1043 value = (rxa > hw->adapter->max_frame_size) ? in e1000_platform_pm_pch_lpt()
1044 (rxa - hw->adapter->max_frame_size) * (16000 / speed) : in e1000_platform_pm_pch_lpt()
1058 pci_read_config_word(hw->adapter->pdev, E1000_PCI_LTR_CAP_LPT, in e1000_platform_pm_pch_lpt()
1060 pci_read_config_word(hw->adapter->pdev, in e1000_platform_pm_pch_lpt()
1087 * @hw: pointer to the HW structure
1095 s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx) in e1000_enable_ulp_lpt_lp() argument
1102 if ((hw->mac.type < e1000_pch_lpt) || in e1000_enable_ulp_lpt_lp()
1103 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_LM) || in e1000_enable_ulp_lpt_lp()
1104 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_V) || in e1000_enable_ulp_lpt_lp()
1105 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM2) || in e1000_enable_ulp_lpt_lp()
1106 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V2) || in e1000_enable_ulp_lpt_lp()
1107 (hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_on)) in e1000_enable_ulp_lpt_lp()
1138 ret_val = hw->phy.ops.acquire(hw); in e1000_enable_ulp_lpt_lp()
1143 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_enable_ulp_lpt_lp()
1147 e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_enable_ulp_lpt_lp()
1157 if ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6)) { in e1000_enable_ulp_lpt_lp()
1158 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_OEM_BITS, in e1000_enable_ulp_lpt_lp()
1166 ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS, in e1000_enable_ulp_lpt_lp()
1176 ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg); in e1000_enable_ulp_lpt_lp()
1194 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_enable_ulp_lpt_lp()
1203 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_enable_ulp_lpt_lp()
1205 if ((hw->phy.type == e1000_phy_i217) && (hw->phy.revision == 6) && in e1000_enable_ulp_lpt_lp()
1207 ret_val = e1000_write_phy_reg_hv_locked(hw, HV_OEM_BITS, in e1000_enable_ulp_lpt_lp()
1214 hw->phy.ops.release(hw); in e1000_enable_ulp_lpt_lp()
1219 hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_on; in e1000_enable_ulp_lpt_lp()
1226 * @hw: pointer to the HW structure
1239 static s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force) in e1000_disable_ulp_lpt_lp() argument
1246 if ((hw->mac.type < e1000_pch_lpt) || in e1000_disable_ulp_lpt_lp()
1247 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_LM) || in e1000_disable_ulp_lpt_lp()
1248 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPT_I217_V) || in e1000_disable_ulp_lpt_lp()
1249 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM2) || in e1000_disable_ulp_lpt_lp()
1250 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V2) || in e1000_disable_ulp_lpt_lp()
1251 (hw->dev_spec.ich8lan.ulp_state == e1000_ulp_state_off)) in e1000_disable_ulp_lpt_lp()
1255 struct e1000_adapter *adapter = hw->adapter; in e1000_disable_ulp_lpt_lp()
1299 ret_val = hw->phy.ops.acquire(hw); in e1000_disable_ulp_lpt_lp()
1305 e1000_toggle_lanphypc_pch_lpt(hw); in e1000_disable_ulp_lpt_lp()
1308 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_disable_ulp_lpt_lp()
1319 ret_val = e1000_read_phy_reg_hv_locked(hw, CV_SMB_CTRL, in e1000_disable_ulp_lpt_lp()
1325 e1000_write_phy_reg_hv_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_disable_ulp_lpt_lp()
1335 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_PM_CTRL, &phy_reg); in e1000_disable_ulp_lpt_lp()
1339 e1000_write_phy_reg_hv_locked(hw, HV_PM_CTRL, phy_reg); in e1000_disable_ulp_lpt_lp()
1342 ret_val = e1000_read_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, &phy_reg); in e1000_disable_ulp_lpt_lp()
1353 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_disable_ulp_lpt_lp()
1357 e1000_write_phy_reg_hv_locked(hw, I218_ULP_CONFIG1, phy_reg); in e1000_disable_ulp_lpt_lp()
1365 hw->phy.ops.release(hw); in e1000_disable_ulp_lpt_lp()
1367 e1000_phy_hw_reset(hw); in e1000_disable_ulp_lpt_lp()
1374 hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_off; in e1000_disable_ulp_lpt_lp()
1381 * @hw: pointer to the HW structure
1387 static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) in e1000_check_for_copper_link_ich8lan() argument
1389 struct e1000_mac_info *mac = &hw->mac; in e1000_check_for_copper_link_ich8lan()
1408 ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link); in e1000_check_for_copper_link_ich8lan()
1412 if (hw->mac.type == e1000_pchlan) { in e1000_check_for_copper_link_ich8lan()
1413 ret_val = e1000_k1_gig_workaround_hv(hw, link); in e1000_check_for_copper_link_ich8lan()
1422 if ((hw->mac.type >= e1000_pch2lan) && link) { in e1000_check_for_copper_link_ich8lan()
1425 e1000e_get_speed_and_duplex_copper(hw, &speed, &duplex); in e1000_check_for_copper_link_ich8lan()
1433 } else if (hw->mac.type >= e1000_pch_spt && in e1000_check_for_copper_link_ich8lan()
1446 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1450 if (hw->mac.type == e1000_pch2lan) in e1000_check_for_copper_link_ich8lan()
1454 ret_val = e1000_write_emi_reg_locked(hw, emi_addr, emi_val); in e1000_check_for_copper_link_ich8lan()
1456 if (hw->mac.type >= e1000_pch_lpt) { in e1000_check_for_copper_link_ich8lan()
1459 e1e_rphy_locked(hw, I217_PLL_CLOCK_GATE_REG, &phy_reg); in e1000_check_for_copper_link_ich8lan()
1465 e1e_wphy_locked(hw, I217_PLL_CLOCK_GATE_REG, phy_reg); in e1000_check_for_copper_link_ich8lan()
1468 hw->phy.ops.read_reg_locked(hw, HV_PM_CTRL, in e1000_check_for_copper_link_ich8lan()
1473 hw->phy.ops.write_reg_locked(hw, HV_PM_CTRL, in e1000_check_for_copper_link_ich8lan()
1477 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1482 if (hw->mac.type >= e1000_pch_spt) { in e1000_check_for_copper_link_ich8lan()
1487 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1491 ret_val = e1e_rphy_locked(hw, in e1000_check_for_copper_link_ich8lan()
1495 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1504 e1e_wphy_locked(hw, in e1000_check_for_copper_link_ich8lan()
1508 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1512 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1516 ret_val = e1e_wphy_locked(hw, in e1000_check_for_copper_link_ich8lan()
1519 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1532 if (hw->mac.type >= e1000_pch_lpt) { in e1000_check_for_copper_link_ich8lan()
1542 if ((hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPTLP_I218_LM) || in e1000_check_for_copper_link_ich8lan()
1543 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_LPTLP_I218_V) || in e1000_check_for_copper_link_ich8lan()
1544 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_LM3) || in e1000_check_for_copper_link_ich8lan()
1545 (hw->adapter->pdev->device == E1000_DEV_ID_PCH_I218_V3)) { in e1000_check_for_copper_link_ich8lan()
1546 ret_val = e1000_k1_workaround_lpt_lp(hw, link); in e1000_check_for_copper_link_ich8lan()
1550 if (hw->mac.type >= e1000_pch_lpt) { in e1000_check_for_copper_link_ich8lan()
1554 ret_val = e1000_platform_pm_pch_lpt(hw, link); in e1000_check_for_copper_link_ich8lan()
1560 hw->dev_spec.ich8lan.eee_lp_ability = 0; in e1000_check_for_copper_link_ich8lan()
1562 if (hw->mac.type >= e1000_pch_lpt) { in e1000_check_for_copper_link_ich8lan()
1565 if (hw->mac.type == e1000_pch_spt) { in e1000_check_for_copper_link_ich8lan()
1581 switch (hw->mac.type) { in e1000_check_for_copper_link_ich8lan()
1583 ret_val = e1000_k1_workaround_lv(hw); in e1000_check_for_copper_link_ich8lan()
1588 if (hw->phy.type == e1000_phy_82578) { in e1000_check_for_copper_link_ich8lan()
1589 ret_val = e1000_link_stall_workaround_hv(hw); in e1000_check_for_copper_link_ich8lan()
1599 e1e_rphy(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg); in e1000_check_for_copper_link_ich8lan()
1605 e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg); in e1000_check_for_copper_link_ich8lan()
1614 e1000e_check_downshift(hw); in e1000_check_for_copper_link_ich8lan()
1617 if (hw->phy.type > e1000_phy_82579) { in e1000_check_for_copper_link_ich8lan()
1618 ret_val = e1000_set_eee_pchlan(hw); in e1000_check_for_copper_link_ich8lan()
1633 mac->ops.config_collision_dist(hw); in e1000_check_for_copper_link_ich8lan()
1640 ret_val = e1000e_config_fc_after_link_up(hw); in e1000_check_for_copper_link_ich8lan()
1653 struct e1000_hw *hw = &adapter->hw; in e1000_get_variants_ich8lan() local
1656 rc = e1000_init_mac_params_ich8lan(hw); in e1000_get_variants_ich8lan()
1660 rc = e1000_init_nvm_params_ich8lan(hw); in e1000_get_variants_ich8lan()
1664 switch (hw->mac.type) { in e1000_get_variants_ich8lan()
1668 rc = e1000_init_phy_params_ich8lan(hw); in e1000_get_variants_ich8lan()
1678 rc = e1000_init_phy_params_pchlan(hw); in e1000_get_variants_ich8lan()
1689 if ((adapter->hw.phy.type == e1000_phy_ife) || in e1000_get_variants_ich8lan()
1690 ((adapter->hw.mac.type >= e1000_pch2lan) && in e1000_get_variants_ich8lan()
1695 hw->mac.ops.blink_led = NULL; in e1000_get_variants_ich8lan()
1698 if ((adapter->hw.mac.type == e1000_ich8lan) && in e1000_get_variants_ich8lan()
1699 (adapter->hw.phy.type != e1000_phy_ife)) in e1000_get_variants_ich8lan()
1703 if ((adapter->hw.mac.type == e1000_pch2lan) && in e1000_get_variants_ich8lan()
1714 * @hw: pointer to the HW structure
1718 static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw __always_unused *hw) in e1000_acquire_nvm_ich8lan() argument
1727 * @hw: pointer to the HW structure
1731 static void e1000_release_nvm_ich8lan(struct e1000_hw __always_unused *hw) in e1000_release_nvm_ich8lan() argument
1738 * @hw: pointer to the HW structure
1743 static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) in e1000_acquire_swflag_ich8lan() argument
1749 &hw->adapter->state)) { in e1000_acquire_swflag_ich8lan()
1784 e_dbg("Failed to acquire the semaphore, FW or HW has it: FWSM=0x%8.8x EXTCNF_CTRL=0x%8.8x)\n", in e1000_acquire_swflag_ich8lan()
1794 clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state); in e1000_acquire_swflag_ich8lan()
1801 * @hw: pointer to the HW structure
1806 static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) in e1000_release_swflag_ich8lan() argument
1816 e_dbg("Semaphore unexpectedly released by sw/fw/hw\n"); in e1000_release_swflag_ich8lan()
1819 clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state); in e1000_release_swflag_ich8lan()
1824 * @hw: pointer to the HW structure
1830 static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw) in e1000_check_mng_mode_ich8lan() argument
1842 * @hw: pointer to the HW structure
1848 static bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw) in e1000_check_mng_mode_pchlan() argument
1859 * @hw: pointer to the HW structure
1868 static int e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index) in e1000_rar_set_pch2lan() argument
1872 /* HW expects these in little endian so we reverse the byte order in e1000_rar_set_pch2lan()
1896 if (index < (u32)(hw->mac.rar_entry_count)) { in e1000_rar_set_pch2lan()
1899 ret_val = e1000_acquire_swflag_ich8lan(hw); in e1000_rar_set_pch2lan()
1908 e1000_release_swflag_ich8lan(hw); in e1000_rar_set_pch2lan()
1926 * @hw: pointer to the HW structure
1934 static u32 e1000_rar_get_count_pch_lpt(struct e1000_hw *hw) in e1000_rar_get_count_pch_lpt() argument
1945 num_entries = hw->mac.rar_entry_count; in e1000_rar_get_count_pch_lpt()
1962 * @hw: pointer to the HW structure
1971 static int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index) in e1000_rar_set_pch_lpt() argument
1976 /* HW expects these in little endian so we reverse the byte order in e1000_rar_set_pch_lpt()
1999 if (index < hw->mac.rar_entry_count) { in e1000_rar_set_pch_lpt()
2010 ret_val = e1000_acquire_swflag_ich8lan(hw); in e1000_rar_set_pch_lpt()
2020 e1000_release_swflag_ich8lan(hw); in e1000_rar_set_pch_lpt()
2036 * @hw: pointer to the HW structure
2042 static s32 e1000_check_reset_block_ich8lan(struct e1000_hw *hw) in e1000_check_reset_block_ich8lan() argument
2055 * @hw: pointer to the HW structure
2060 static s32 e1000_write_smbus_addr(struct e1000_hw *hw) in e1000_write_smbus_addr() argument
2070 ret_val = e1000_read_phy_reg_hv_locked(hw, HV_SMB_ADDR, &phy_data); in e1000_write_smbus_addr()
2078 if (hw->phy.type == e1000_phy_i217) { in e1000_write_smbus_addr()
2091 return e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, phy_data); in e1000_write_smbus_addr()
2096 * @hw: pointer to the HW structure
2101 static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) in e1000_sw_lcd_config_ich8lan() argument
2103 struct e1000_phy_info *phy = &hw->phy; in e1000_sw_lcd_config_ich8lan()
2114 switch (hw->mac.type) { in e1000_sw_lcd_config_ich8lan()
2119 if ((hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_AMT) || in e1000_sw_lcd_config_ich8lan()
2120 (hw->adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_C)) { in e1000_sw_lcd_config_ich8lan()
2139 ret_val = hw->phy.ops.acquire(hw); in e1000_sw_lcd_config_ich8lan()
2147 /* Make sure HW does not configure LCD from PHY in e1000_sw_lcd_config_ich8lan()
2151 if ((hw->mac.type < e1000_pch2lan) && in e1000_sw_lcd_config_ich8lan()
2164 if (((hw->mac.type == e1000_pchlan) && in e1000_sw_lcd_config_ich8lan()
2166 (hw->mac.type > e1000_pchlan)) { in e1000_sw_lcd_config_ich8lan()
2167 /* HW configures the SMBus address and LEDs when the in e1000_sw_lcd_config_ich8lan()
2172 ret_val = e1000_write_smbus_addr(hw); in e1000_sw_lcd_config_ich8lan()
2177 ret_val = e1000_write_phy_reg_hv_locked(hw, HV_LED_CONFIG, in e1000_sw_lcd_config_ich8lan()
2189 ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1, ®_data); in e1000_sw_lcd_config_ich8lan()
2193 ret_val = e1000_read_nvm(hw, (word_addr + i * 2 + 1), in e1000_sw_lcd_config_ich8lan()
2207 ret_val = e1e_wphy_locked(hw, (u32)reg_addr, reg_data); in e1000_sw_lcd_config_ich8lan()
2213 hw->phy.ops.release(hw); in e1000_sw_lcd_config_ich8lan()
2219 * @hw: pointer to the HW structure
2227 static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link) in e1000_k1_gig_workaround_hv() argument
2231 bool k1_enable = hw->dev_spec.ich8lan.nvm_k1_enabled; in e1000_k1_gig_workaround_hv()
2233 if (hw->mac.type != e1000_pchlan) in e1000_k1_gig_workaround_hv()
2237 ret_val = hw->phy.ops.acquire(hw); in e1000_k1_gig_workaround_hv()
2243 if (hw->phy.type == e1000_phy_82578) { in e1000_k1_gig_workaround_hv()
2244 ret_val = e1e_rphy_locked(hw, BM_CS_STATUS, in e1000_k1_gig_workaround_hv()
2259 if (hw->phy.type == e1000_phy_82577) { in e1000_k1_gig_workaround_hv()
2260 ret_val = e1e_rphy_locked(hw, HV_M_STATUS, &status_reg); in e1000_k1_gig_workaround_hv()
2275 ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x0100); in e1000_k1_gig_workaround_hv()
2281 ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x4100); in e1000_k1_gig_workaround_hv()
2286 ret_val = e1000_configure_k1_ich8lan(hw, k1_enable); in e1000_k1_gig_workaround_hv()
2289 hw->phy.ops.release(hw); in e1000_k1_gig_workaround_hv()
2296 * @hw: pointer to the HW structure
2304 s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable) in e1000_configure_k1_ich8lan() argument
2312 ret_val = e1000e_read_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG, in e1000_configure_k1_ich8lan()
2322 ret_val = e1000e_write_kmrn_reg_locked(hw, E1000_KMRNCTRLSTA_K1_CONFIG, in e1000_configure_k1_ich8lan()
2348 * @hw: pointer to the HW structure
2353 * in NVM determines whether HW should configure LPLU and Gbe Disable.
2355 static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state) in e1000_oem_bits_config_ich8lan() argument
2361 if (hw->mac.type < e1000_pchlan) in e1000_oem_bits_config_ich8lan()
2364 ret_val = hw->phy.ops.acquire(hw); in e1000_oem_bits_config_ich8lan()
2368 if (hw->mac.type == e1000_pchlan) { in e1000_oem_bits_config_ich8lan()
2380 ret_val = e1e_rphy_locked(hw, HV_OEM_BITS, &oem_reg); in e1000_oem_bits_config_ich8lan()
2403 if ((d0_state || (hw->mac.type != e1000_pchlan)) && in e1000_oem_bits_config_ich8lan()
2404 !hw->phy.ops.check_reset_block(hw)) in e1000_oem_bits_config_ich8lan()
2407 ret_val = e1e_wphy_locked(hw, HV_OEM_BITS, oem_reg); in e1000_oem_bits_config_ich8lan()
2410 hw->phy.ops.release(hw); in e1000_oem_bits_config_ich8lan()
2417 * @hw: pointer to the HW structure
2419 static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw) in e1000_set_mdio_slow_mode_hv() argument
2424 ret_val = e1e_rphy(hw, HV_KMRN_MODE_CTRL, &data); in e1000_set_mdio_slow_mode_hv()
2430 ret_val = e1e_wphy(hw, HV_KMRN_MODE_CTRL, data); in e1000_set_mdio_slow_mode_hv()
2437 * @hw: pointer to the HW structure
2441 static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) in e1000_hv_phy_workarounds_ich8lan() argument
2446 if (hw->mac.type != e1000_pchlan) in e1000_hv_phy_workarounds_ich8lan()
2450 if (hw->phy.type == e1000_phy_82577) { in e1000_hv_phy_workarounds_ich8lan()
2451 ret_val = e1000_set_mdio_slow_mode_hv(hw); in e1000_hv_phy_workarounds_ich8lan()
2456 if (((hw->phy.type == e1000_phy_82577) && in e1000_hv_phy_workarounds_ich8lan()
2457 ((hw->phy.revision == 1) || (hw->phy.revision == 2))) || in e1000_hv_phy_workarounds_ich8lan()
2458 ((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) { in e1000_hv_phy_workarounds_ich8lan()
2460 ret_val = e1e_wphy(hw, PHY_REG(769, 25), 0x4431); in e1000_hv_phy_workarounds_ich8lan()
2465 ret_val = e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, 0xA204); in e1000_hv_phy_workarounds_ich8lan()
2470 if (hw->phy.type == e1000_phy_82578) { in e1000_hv_phy_workarounds_ich8lan()
2474 if (hw->phy.revision < 2) { in e1000_hv_phy_workarounds_ich8lan()
2475 e1000e_phy_sw_reset(hw); in e1000_hv_phy_workarounds_ich8lan()
2476 ret_val = e1e_wphy(hw, MII_BMCR, 0x3140); in e1000_hv_phy_workarounds_ich8lan()
2483 ret_val = hw->phy.ops.acquire(hw); in e1000_hv_phy_workarounds_ich8lan()
2487 hw->phy.addr = 1; in e1000_hv_phy_workarounds_ich8lan()
2488 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); in e1000_hv_phy_workarounds_ich8lan()
2489 hw->phy.ops.release(hw); in e1000_hv_phy_workarounds_ich8lan()
2496 ret_val = e1000_k1_gig_workaround_hv(hw, true); in e1000_hv_phy_workarounds_ich8lan()
2501 ret_val = hw->phy.ops.acquire(hw); in e1000_hv_phy_workarounds_ich8lan()
2504 ret_val = e1e_rphy_locked(hw, BM_PORT_GEN_CFG, &phy_data); in e1000_hv_phy_workarounds_ich8lan()
2507 ret_val = e1e_wphy_locked(hw, BM_PORT_GEN_CFG, phy_data & 0x00FF); in e1000_hv_phy_workarounds_ich8lan()
2512 ret_val = e1000_write_emi_reg_locked(hw, I82577_MSE_THRESHOLD, 0x0034); in e1000_hv_phy_workarounds_ich8lan()
2514 hw->phy.ops.release(hw); in e1000_hv_phy_workarounds_ich8lan()
2521 * @hw: pointer to the HW structure
2523 void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw) in e1000_copy_rx_addrs_to_phy_ich8lan() argument
2529 ret_val = hw->phy.ops.acquire(hw); in e1000_copy_rx_addrs_to_phy_ich8lan()
2532 ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_copy_rx_addrs_to_phy_ich8lan()
2537 for (i = 0; i < (hw->mac.rar_entry_count); i++) { in e1000_copy_rx_addrs_to_phy_ich8lan()
2539 hw->phy.ops.write_reg_page(hw, BM_RAR_L(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2541 hw->phy.ops.write_reg_page(hw, BM_RAR_M(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2545 hw->phy.ops.write_reg_page(hw, BM_RAR_H(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2547 hw->phy.ops.write_reg_page(hw, BM_RAR_CTRL(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2552 e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg); in e1000_copy_rx_addrs_to_phy_ich8lan()
2555 hw->phy.ops.release(hw); in e1000_copy_rx_addrs_to_phy_ich8lan()
2561 * @hw: pointer to the HW structure
2564 s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable) in e1000_lv_jumbo_workaround_ich8lan() argument
2571 if (hw->mac.type < e1000_pch2lan) in e1000_lv_jumbo_workaround_ich8lan()
2575 e1e_rphy(hw, PHY_REG(769, 20), &phy_reg); in e1000_lv_jumbo_workaround_ich8lan()
2576 ret_val = e1e_wphy(hw, PHY_REG(769, 20), phy_reg | BIT(14)); in e1000_lv_jumbo_workaround_ich8lan()
2584 for (i = 0; i < hw->mac.rar_entry_count; i++) { in e1000_lv_jumbo_workaround_ich8lan()
2603 e1000_copy_rx_addrs_to_phy_ich8lan(hw); in e1000_lv_jumbo_workaround_ich8lan()
2615 ret_val = e1000e_read_kmrn_reg(hw, in e1000_lv_jumbo_workaround_ich8lan()
2620 ret_val = e1000e_write_kmrn_reg(hw, in e1000_lv_jumbo_workaround_ich8lan()
2625 ret_val = e1000e_read_kmrn_reg(hw, in e1000_lv_jumbo_workaround_ich8lan()
2632 ret_val = e1000e_write_kmrn_reg(hw, in e1000_lv_jumbo_workaround_ich8lan()
2639 e1e_rphy(hw, PHY_REG(769, 23), &data); in e1000_lv_jumbo_workaround_ich8lan()
2642 ret_val = e1e_wphy(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2645 e1e_rphy(hw, PHY_REG(769, 16), &data); in e1000_lv_jumbo_workaround_ich8lan()
2647 ret_val = e1e_wphy(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2650 e1e_rphy(hw, PHY_REG(776, 20), &data); in e1000_lv_jumbo_workaround_ich8lan()
2653 ret_val = e1e_wphy(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2656 ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0xF100); in e1000_lv_jumbo_workaround_ich8lan()
2659 e1e_rphy(hw, HV_PM_CTRL, &data); in e1000_lv_jumbo_workaround_ich8lan()
2660 ret_val = e1e_wphy(hw, HV_PM_CTRL, data | BIT(10)); in e1000_lv_jumbo_workaround_ich8lan()
2673 ret_val = e1000e_read_kmrn_reg(hw, in e1000_lv_jumbo_workaround_ich8lan()
2678 ret_val = e1000e_write_kmrn_reg(hw, in e1000_lv_jumbo_workaround_ich8lan()
2683 ret_val = e1000e_read_kmrn_reg(hw, in e1000_lv_jumbo_workaround_ich8lan()
2690 ret_val = e1000e_write_kmrn_reg(hw, in e1000_lv_jumbo_workaround_ich8lan()
2697 e1e_rphy(hw, PHY_REG(769, 23), &data); in e1000_lv_jumbo_workaround_ich8lan()
2699 ret_val = e1e_wphy(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2702 e1e_rphy(hw, PHY_REG(769, 16), &data); in e1000_lv_jumbo_workaround_ich8lan()
2704 ret_val = e1e_wphy(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2707 e1e_rphy(hw, PHY_REG(776, 20), &data); in e1000_lv_jumbo_workaround_ich8lan()
2710 ret_val = e1e_wphy(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2713 ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0x7E00); in e1000_lv_jumbo_workaround_ich8lan()
2716 e1e_rphy(hw, HV_PM_CTRL, &data); in e1000_lv_jumbo_workaround_ich8lan()
2717 ret_val = e1e_wphy(hw, HV_PM_CTRL, data & ~BIT(10)); in e1000_lv_jumbo_workaround_ich8lan()
2723 return e1e_wphy(hw, PHY_REG(769, 20), phy_reg & ~BIT(14)); in e1000_lv_jumbo_workaround_ich8lan()
2728 * @hw: pointer to the HW structure
2732 static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw) in e1000_lv_phy_workarounds_ich8lan() argument
2736 if (hw->mac.type != e1000_pch2lan) in e1000_lv_phy_workarounds_ich8lan()
2740 ret_val = e1000_set_mdio_slow_mode_hv(hw); in e1000_lv_phy_workarounds_ich8lan()
2744 ret_val = hw->phy.ops.acquire(hw); in e1000_lv_phy_workarounds_ich8lan()
2748 ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_THRESHOLD, 0x0034); in e1000_lv_phy_workarounds_ich8lan()
2752 ret_val = e1000_write_emi_reg_locked(hw, I82579_MSE_LINK_DOWN, 0x0005); in e1000_lv_phy_workarounds_ich8lan()
2754 hw->phy.ops.release(hw); in e1000_lv_phy_workarounds_ich8lan()
2761 * @hw: pointer to the HW structure
2766 static s32 e1000_k1_workaround_lv(struct e1000_hw *hw) in e1000_k1_workaround_lv() argument
2771 if (hw->mac.type != e1000_pch2lan) in e1000_k1_workaround_lv()
2775 ret_val = e1e_rphy(hw, HV_M_STATUS, &status_reg); in e1000_k1_workaround_lv()
2786 ret_val = e1e_rphy(hw, HV_PM_CTRL, &pm_phy_reg); in e1000_k1_workaround_lv()
2790 ret_val = e1e_wphy(hw, HV_PM_CTRL, pm_phy_reg); in e1000_k1_workaround_lv()
2808 * @hw: pointer to the HW structure
2814 static void e1000_gate_hw_phy_config_ich8lan(struct e1000_hw *hw, bool gate) in e1000_gate_hw_phy_config_ich8lan() argument
2818 if (hw->mac.type < e1000_pch2lan) in e1000_gate_hw_phy_config_ich8lan()
2833 * @hw: pointer to the HW structure
2838 static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw) in e1000_lan_init_done_ich8lan() argument
2864 * @hw: pointer to the HW structure
2866 static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw) in e1000_post_phy_reset_ich8lan() argument
2871 if (hw->phy.ops.check_reset_block(hw)) in e1000_post_phy_reset_ich8lan()
2878 switch (hw->mac.type) { in e1000_post_phy_reset_ich8lan()
2880 ret_val = e1000_hv_phy_workarounds_ich8lan(hw); in e1000_post_phy_reset_ich8lan()
2885 ret_val = e1000_lv_phy_workarounds_ich8lan(hw); in e1000_post_phy_reset_ich8lan()
2894 if (hw->mac.type >= e1000_pchlan) { in e1000_post_phy_reset_ich8lan()
2895 e1e_rphy(hw, BM_PORT_GEN_CFG, ®); in e1000_post_phy_reset_ich8lan()
2897 e1e_wphy(hw, BM_PORT_GEN_CFG, reg); in e1000_post_phy_reset_ich8lan()
2901 ret_val = e1000_sw_lcd_config_ich8lan(hw); in e1000_post_phy_reset_ich8lan()
2906 ret_val = e1000_oem_bits_config_ich8lan(hw, true); in e1000_post_phy_reset_ich8lan()
2908 if (hw->mac.type == e1000_pch2lan) { in e1000_post_phy_reset_ich8lan()
2912 e1000_gate_hw_phy_config_ich8lan(hw, false); in e1000_post_phy_reset_ich8lan()
2916 ret_val = hw->phy.ops.acquire(hw); in e1000_post_phy_reset_ich8lan()
2919 ret_val = e1000_write_emi_reg_locked(hw, in e1000_post_phy_reset_ich8lan()
2922 hw->phy.ops.release(hw); in e1000_post_phy_reset_ich8lan()
2930 * @hw: pointer to the HW structure
2936 static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) in e1000_phy_hw_reset_ich8lan() argument
2941 if ((hw->mac.type == e1000_pch2lan) && in e1000_phy_hw_reset_ich8lan()
2943 e1000_gate_hw_phy_config_ich8lan(hw, true); in e1000_phy_hw_reset_ich8lan()
2945 ret_val = e1000e_phy_hw_reset_generic(hw); in e1000_phy_hw_reset_ich8lan()
2949 return e1000_post_phy_reset_ich8lan(hw); in e1000_phy_hw_reset_ich8lan()
2954 * @hw: pointer to the HW structure
2960 * auto-neg as hw would do. D3 and D0 LPLU will call the same function
2963 static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active) in e1000_set_lplu_state_pchlan() argument
2968 ret_val = e1e_rphy(hw, HV_OEM_BITS, &oem_reg); in e1000_set_lplu_state_pchlan()
2977 if (!hw->phy.ops.check_reset_block(hw)) in e1000_set_lplu_state_pchlan()
2980 return e1e_wphy(hw, HV_OEM_BITS, oem_reg); in e1000_set_lplu_state_pchlan()
2985 * @hw: pointer to the HW structure
2996 static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active) in e1000_set_d0_lplu_state_ich8lan() argument
2998 struct e1000_phy_info *phy = &hw->phy; in e1000_set_d0_lplu_state_ich8lan()
3018 if (hw->mac.type == e1000_ich8lan) in e1000_set_d0_lplu_state_ich8lan()
3019 e1000e_gig_downshift_workaround_ich8lan(hw); in e1000_set_d0_lplu_state_ich8lan()
3022 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data); in e1000_set_d0_lplu_state_ich8lan()
3026 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data); in e1000_set_d0_lplu_state_ich8lan()
3042 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_ich8lan()
3048 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_ich8lan()
3053 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_ich8lan()
3059 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_ich8lan()
3071 * @hw: pointer to the HW structure
3082 static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active) in e1000_set_d3_lplu_state_ich8lan() argument
3084 struct e1000_phy_info *phy = &hw->phy; in e1000_set_d3_lplu_state_ich8lan()
3104 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state_ich8lan()
3110 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state_ich8lan()
3115 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state_ich8lan()
3121 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d3_lplu_state_ich8lan()
3138 if (hw->mac.type == e1000_ich8lan) in e1000_set_d3_lplu_state_ich8lan()
3139 e1000e_gig_downshift_workaround_ich8lan(hw); in e1000_set_d3_lplu_state_ich8lan()
3142 ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG, &data); in e1000_set_d3_lplu_state_ich8lan()
3147 ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG, data); in e1000_set_d3_lplu_state_ich8lan()
3155 * @hw: pointer to the HW structure
3161 static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank) in e1000_valid_nvm_bank_detect_ich8lan() argument
3164 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_valid_nvm_bank_detect_ich8lan()
3171 switch (hw->mac.type) { in e1000_valid_nvm_bank_detect_ich8lan()
3184 ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, in e1000_valid_nvm_bank_detect_ich8lan()
3196 ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset + in e1000_valid_nvm_bank_detect_ich8lan()
3229 ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset, in e1000_valid_nvm_bank_detect_ich8lan()
3240 ret_val = e1000_read_flash_byte_ich8lan(hw, act_offset + in e1000_valid_nvm_bank_detect_ich8lan()
3258 * @hw: pointer to the HW structure
3265 static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words, in e1000_read_nvm_spt() argument
3268 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_read_nvm_spt()
3269 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_read_nvm_spt()
3284 nvm->ops.acquire(hw); in e1000_read_nvm_spt()
3286 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); in e1000_read_nvm_spt()
3306 e1000_read_flash_dword_ich8lan(hw, in e1000_read_nvm_spt()
3321 e1000_read_flash_dword_ich8lan(hw, in e1000_read_nvm_spt()
3340 nvm->ops.release(hw); in e1000_read_nvm_spt()
3351 * @hw: pointer to the HW structure
3358 static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, in e1000_read_nvm_ich8lan() argument
3361 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_read_nvm_ich8lan()
3362 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_read_nvm_ich8lan()
3375 nvm->ops.acquire(hw); in e1000_read_nvm_ich8lan()
3377 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); in e1000_read_nvm_ich8lan()
3391 ret_val = e1000_read_flash_word_ich8lan(hw, in e1000_read_nvm_ich8lan()
3400 nvm->ops.release(hw); in e1000_read_nvm_ich8lan()
3411 * @hw: pointer to the HW structure
3416 static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) in e1000_flash_cycle_init_ich8lan() argument
3429 /* Clear FCERR and DAEL in hw status by writing 1 */ in e1000_flash_cycle_init_ich8lan()
3432 if (hw->mac.type >= e1000_pch_spt) in e1000_flash_cycle_init_ich8lan()
3451 if (hw->mac.type >= e1000_pch_spt) in e1000_flash_cycle_init_ich8lan()
3475 if (hw->mac.type >= e1000_pch_spt) in e1000_flash_cycle_init_ich8lan()
3490 * @hw: pointer to the HW structure
3495 static s32 e1000_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout) in e1000_flash_cycle_ich8lan() argument
3501 /* Start a cycle by writing 1 in Flash Cycle Go in Hw Flash Control */ in e1000_flash_cycle_ich8lan()
3502 if (hw->mac.type >= e1000_pch_spt) in e1000_flash_cycle_ich8lan()
3508 if (hw->mac.type >= e1000_pch_spt) in e1000_flash_cycle_ich8lan()
3529 * @hw: pointer to the HW structure
3536 static s32 e1000_read_flash_dword_ich8lan(struct e1000_hw *hw, u32 offset, in e1000_read_flash_dword_ich8lan() argument
3541 return e1000_read_flash_data32_ich8lan(hw, offset, data); in e1000_read_flash_dword_ich8lan()
3546 * @hw: pointer to the HW structure
3553 static s32 e1000_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset, in e1000_read_flash_word_ich8lan() argument
3559 return e1000_read_flash_data_ich8lan(hw, offset, 2, data); in e1000_read_flash_word_ich8lan()
3564 * @hw: pointer to the HW structure
3570 static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, in e1000_read_flash_byte_ich8lan() argument
3579 if (hw->mac.type >= e1000_pch_spt) in e1000_read_flash_byte_ich8lan()
3582 ret_val = e1000_read_flash_data_ich8lan(hw, offset, 1, &word); in e1000_read_flash_byte_ich8lan()
3594 * @hw: pointer to the HW structure
3601 static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, in e1000_read_flash_data_ich8lan() argument
3615 hw->nvm.flash_base_addr); in e1000_read_flash_data_ich8lan()
3620 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_read_flash_data_ich8lan()
3633 e1000_flash_cycle_ich8lan(hw, in e1000_read_flash_data_ich8lan()
3670 * @hw: pointer to the HW structure
3677 static s32 e1000_read_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset, in e1000_read_flash_data32_ich8lan() argument
3686 if (offset > ICH_FLASH_LINEAR_ADDR_MASK || hw->mac.type < e1000_pch_spt) in e1000_read_flash_data32_ich8lan()
3689 hw->nvm.flash_base_addr); in e1000_read_flash_data32_ich8lan()
3694 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_read_flash_data32_ich8lan()
3712 e1000_flash_cycle_ich8lan(hw, in e1000_read_flash_data32_ich8lan()
3745 * @hw: pointer to the HW structure
3752 static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, in e1000_write_nvm_ich8lan() argument
3755 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_write_nvm_ich8lan()
3756 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_write_nvm_ich8lan()
3765 nvm->ops.acquire(hw); in e1000_write_nvm_ich8lan()
3772 nvm->ops.release(hw); in e1000_write_nvm_ich8lan()
3779 * @hw: pointer to the HW structure
3788 static s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw) in e1000_update_nvm_checksum_spt() argument
3790 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_update_nvm_checksum_spt()
3791 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_update_nvm_checksum_spt()
3796 ret_val = e1000e_update_nvm_checksum_generic(hw); in e1000_update_nvm_checksum_spt()
3803 nvm->ops.acquire(hw); in e1000_update_nvm_checksum_spt()
3809 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); in e1000_update_nvm_checksum_spt()
3818 ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); in e1000_update_nvm_checksum_spt()
3824 ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); in e1000_update_nvm_checksum_spt()
3833 ret_val = e1000_read_flash_dword_ich8lan(hw, in e1000_update_nvm_checksum_spt()
3866 ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, in e1000_update_nvm_checksum_spt()
3890 ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword); in e1000_update_nvm_checksum_spt()
3896 ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword); in e1000_update_nvm_checksum_spt()
3910 ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword); in e1000_update_nvm_checksum_spt()
3916 ret_val = e1000_retry_write_flash_dword_ich8lan(hw, act_offset, dword); in e1000_update_nvm_checksum_spt()
3928 nvm->ops.release(hw); in e1000_update_nvm_checksum_spt()
3934 nvm->ops.reload(hw); in e1000_update_nvm_checksum_spt()
3947 * @hw: pointer to the HW structure
3956 static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) in e1000_update_nvm_checksum_ich8lan() argument
3958 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_update_nvm_checksum_ich8lan()
3959 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_update_nvm_checksum_ich8lan()
3964 ret_val = e1000e_update_nvm_checksum_generic(hw); in e1000_update_nvm_checksum_ich8lan()
3971 nvm->ops.acquire(hw); in e1000_update_nvm_checksum_ich8lan()
3977 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); in e1000_update_nvm_checksum_ich8lan()
3986 ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); in e1000_update_nvm_checksum_ich8lan()
3992 ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); in e1000_update_nvm_checksum_ich8lan()
4000 ret_val = e1000_read_flash_word_ich8lan(hw, i + in e1000_update_nvm_checksum_ich8lan()
4022 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, in e1000_update_nvm_checksum_ich8lan()
4029 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, in e1000_update_nvm_checksum_ich8lan()
4051 ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); in e1000_update_nvm_checksum_ich8lan()
4056 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, in e1000_update_nvm_checksum_ich8lan()
4068 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); in e1000_update_nvm_checksum_ich8lan()
4079 nvm->ops.release(hw); in e1000_update_nvm_checksum_ich8lan()
4085 nvm->ops.reload(hw); in e1000_update_nvm_checksum_ich8lan()
4098 * @hw: pointer to the HW structure
4104 static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) in e1000_validate_nvm_checksum_ich8lan() argument
4116 switch (hw->mac.type) { in e1000_validate_nvm_checksum_ich8lan()
4132 ret_val = e1000_read_nvm(hw, word, 1, &data); in e1000_validate_nvm_checksum_ich8lan()
4139 if (hw->mac.type < e1000_pch_tgp) { in e1000_validate_nvm_checksum_ich8lan()
4141 ret_val = e1000_write_nvm(hw, word, 1, &data); in e1000_validate_nvm_checksum_ich8lan()
4144 ret_val = e1000e_update_nvm_checksum(hw); in e1000_validate_nvm_checksum_ich8lan()
4150 return e1000e_validate_nvm_checksum_generic(hw); in e1000_validate_nvm_checksum_ich8lan()
4155 * @hw: pointer to the HW structure
4163 void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw) in e1000e_write_protect_nvm_ich8lan() argument
4165 struct e1000_nvm_info *nvm = &hw->nvm; in e1000e_write_protect_nvm_ich8lan()
4170 nvm->ops.acquire(hw); in e1000e_write_protect_nvm_ich8lan()
4190 nvm->ops.release(hw); in e1000e_write_protect_nvm_ich8lan()
4195 * @hw: pointer to the HW structure
4202 static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, in e1000_write_flash_data_ich8lan() argument
4212 if (hw->mac.type >= e1000_pch_spt) { in e1000_write_flash_data_ich8lan()
4221 hw->nvm.flash_base_addr); in e1000_write_flash_data_ich8lan()
4226 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_write_flash_data_ich8lan()
4232 if (hw->mac.type >= e1000_pch_spt) in e1000_write_flash_data_ich8lan()
4244 if (hw->mac.type >= e1000_pch_spt) in e1000_write_flash_data_ich8lan()
4262 e1000_flash_cycle_ich8lan(hw, in e1000_write_flash_data_ich8lan()
4287 * @hw: pointer to the HW structure
4293 static s32 e1000_write_flash_data32_ich8lan(struct e1000_hw *hw, u32 offset, in e1000_write_flash_data32_ich8lan() argument
4302 if (hw->mac.type >= e1000_pch_spt) { in e1000_write_flash_data32_ich8lan()
4307 hw->nvm.flash_base_addr); in e1000_write_flash_data32_ich8lan()
4311 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_write_flash_data32_ich8lan()
4318 if (hw->mac.type >= e1000_pch_spt) in e1000_write_flash_data32_ich8lan()
4331 if (hw->mac.type >= e1000_pch_spt) in e1000_write_flash_data32_ich8lan()
4344 e1000_flash_cycle_ich8lan(hw, in e1000_write_flash_data32_ich8lan()
4371 * @hw: pointer to the HW structure
4377 static s32 e1000_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset, in e1000_write_flash_byte_ich8lan() argument
4382 return e1000_write_flash_data_ich8lan(hw, offset, 1, word); in e1000_write_flash_byte_ich8lan()
4387 * @hw: pointer to the HW structure
4394 static s32 e1000_retry_write_flash_dword_ich8lan(struct e1000_hw *hw, in e1000_retry_write_flash_dword_ich8lan() argument
4402 ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword); in e1000_retry_write_flash_dword_ich8lan()
4409 ret_val = e1000_write_flash_data32_ich8lan(hw, offset, dword); in e1000_retry_write_flash_dword_ich8lan()
4421 * @hw: pointer to the HW structure
4428 static s32 e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw, in e1000_retry_write_flash_byte_ich8lan() argument
4434 ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte); in e1000_retry_write_flash_byte_ich8lan()
4441 ret_val = e1000_write_flash_byte_ich8lan(hw, offset, byte); in e1000_retry_write_flash_byte_ich8lan()
4453 * @hw: pointer to the HW structure
4459 static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank) in e1000_erase_flash_bank_ich8lan() argument
4461 struct e1000_nvm_info *nvm = &hw->nvm; in e1000_erase_flash_bank_ich8lan()
4473 /* Determine HW Sector size: Read BERASE bits of hw flash status in e1000_erase_flash_bank_ich8lan()
4475 * 00: The Hw sector is 256 bytes, hence we need to erase 16 in e1000_erase_flash_bank_ich8lan()
4476 * consecutive sectors. The start index for the nth Hw sector in e1000_erase_flash_bank_ich8lan()
4478 * 01: The Hw sector is 4K bytes, hence we need to erase 1 sector. in e1000_erase_flash_bank_ich8lan()
4479 * The start index for the nth Hw sector can be calculated in e1000_erase_flash_bank_ich8lan()
4481 * 10: The Hw sector is 8K bytes, nth sector = bank * 8192 in e1000_erase_flash_bank_ich8lan()
4483 * 11: The Hw sector is 64K bytes, nth sector = bank * 65536 in e1000_erase_flash_bank_ich8lan()
4487 /* Hw sector size 256 */ in e1000_erase_flash_bank_ich8lan()
4508 flash_linear_addr = hw->nvm.flash_base_addr; in e1000_erase_flash_bank_ich8lan()
4516 ret_val = e1000_flash_cycle_init_ich8lan(hw); in e1000_erase_flash_bank_ich8lan()
4521 * Cycle field in hw flash control in e1000_erase_flash_bank_ich8lan()
4523 if (hw->mac.type >= e1000_pch_spt) in e1000_erase_flash_bank_ich8lan()
4530 if (hw->mac.type >= e1000_pch_spt) in e1000_erase_flash_bank_ich8lan()
4543 ret_val = e1000_flash_cycle_ich8lan(hw, timeout); in e1000_erase_flash_bank_ich8lan()
4565 * @hw: pointer to the HW structure
4572 static s32 e1000_valid_led_default_ich8lan(struct e1000_hw *hw, u16 *data) in e1000_valid_led_default_ich8lan() argument
4576 ret_val = e1000_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_ich8lan()
4590 * @hw: pointer to the HW structure
4601 static s32 e1000_id_led_init_pchlan(struct e1000_hw *hw) in e1000_id_led_init_pchlan() argument
4603 struct e1000_mac_info *mac = &hw->mac; in e1000_id_led_init_pchlan()
4610 ret_val = hw->nvm.ops.valid_led_default(hw, &data); in e1000_id_led_init_pchlan()
4662 * @hw: pointer to the HW structure
4667 static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw) in e1000_get_bus_info_ich8lan() argument
4669 struct e1000_bus_info *bus = &hw->bus; in e1000_get_bus_info_ich8lan()
4672 ret_val = e1000e_get_bus_info_pcie(hw); in e1000_get_bus_info_ich8lan()
4687 * @hw: pointer to the HW structure
4692 static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) in e1000_reset_hw_ich8lan() argument
4694 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_reset_hw_ich8lan()
4702 ret_val = e1000e_disable_pcie_master(hw); in e1000_reset_hw_ich8lan()
4720 if (hw->mac.type == e1000_ich8lan) { in e1000_reset_hw_ich8lan()
4727 if (hw->mac.type == e1000_pchlan) { in e1000_reset_hw_ich8lan()
4729 ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &kum_cfg); in e1000_reset_hw_ich8lan()
4741 if (!hw->phy.ops.check_reset_block(hw)) { in e1000_reset_hw_ich8lan()
4751 if ((hw->mac.type == e1000_pch2lan) && in e1000_reset_hw_ich8lan()
4753 e1000_gate_hw_phy_config_ich8lan(hw, true); in e1000_reset_hw_ich8lan()
4755 ret_val = e1000_acquire_swflag_ich8lan(hw); in e1000_reset_hw_ich8lan()
4762 if (hw->mac.type == e1000_pch2lan) { in e1000_reset_hw_ich8lan()
4770 clear_bit(__E1000_ACCESS_SHARED_RESOURCE, &hw->adapter->state); in e1000_reset_hw_ich8lan()
4773 ret_val = hw->phy.ops.get_cfg_done(hw); in e1000_reset_hw_ich8lan()
4777 ret_val = e1000_post_phy_reset_ich8lan(hw); in e1000_reset_hw_ich8lan()
4786 if (hw->mac.type == e1000_pchlan) in e1000_reset_hw_ich8lan()
4801 * @hw: pointer to the HW structure
4811 static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw) in e1000_init_hw_ich8lan() argument
4813 struct e1000_mac_info *mac = &hw->mac; in e1000_init_hw_ich8lan()
4818 e1000_initialize_hw_bits_ich8lan(hw); in e1000_init_hw_ich8lan()
4821 ret_val = mac->ops.id_led_init(hw); in e1000_init_hw_ich8lan()
4827 e1000e_init_rx_addrs(hw, mac->rar_entry_count); in e1000_init_hw_ich8lan()
4832 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0); in e1000_init_hw_ich8lan()
4838 if (hw->phy.type == e1000_phy_82578) { in e1000_init_hw_ich8lan()
4839 e1e_rphy(hw, BM_PORT_GEN_CFG, &i); in e1000_init_hw_ich8lan()
4841 e1e_wphy(hw, BM_PORT_GEN_CFG, i); in e1000_init_hw_ich8lan()
4842 ret_val = e1000_phy_hw_reset_ich8lan(hw); in e1000_init_hw_ich8lan()
4848 ret_val = mac->ops.setup_link(hw); in e1000_init_hw_ich8lan()
4871 e1000e_set_pcie_no_snoop(hw, snoop); in e1000_init_hw_ich8lan()
4891 e1000_clear_hw_cntrs_ich8lan(hw); in e1000_init_hw_ich8lan()
4898 * @hw: pointer to the HW structure
4903 static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw) in e1000_initialize_hw_bits_ich8lan() argument
4911 if (hw->mac.type >= e1000_pchlan) in e1000_initialize_hw_bits_ich8lan()
4927 if (hw->mac.type == e1000_ich8lan) in e1000_initialize_hw_bits_ich8lan()
4942 if (hw->mac.type == e1000_ich8lan) { in e1000_initialize_hw_bits_ich8lan()
4957 if (hw->mac.type == e1000_ich8lan) in e1000_initialize_hw_bits_ich8lan()
4962 if (hw->mac.type >= e1000_pch_lpt) { in e1000_initialize_hw_bits_ich8lan()
4975 * @hw: pointer to the HW structure
4983 static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw) in e1000_setup_link_ich8lan() argument
4987 if (hw->phy.ops.check_reset_block(hw)) in e1000_setup_link_ich8lan()
4994 if (hw->fc.requested_mode == e1000_fc_default) { in e1000_setup_link_ich8lan()
4996 if (hw->mac.type == e1000_pchlan) in e1000_setup_link_ich8lan()
4997 hw->fc.requested_mode = e1000_fc_rx_pause; in e1000_setup_link_ich8lan()
4999 hw->fc.requested_mode = e1000_fc_full; in e1000_setup_link_ich8lan()
5005 hw->fc.current_mode = hw->fc.requested_mode; in e1000_setup_link_ich8lan()
5007 e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc.current_mode); in e1000_setup_link_ich8lan()
5010 ret_val = hw->mac.ops.setup_physical_interface(hw); in e1000_setup_link_ich8lan()
5014 ew32(FCTTV, hw->fc.pause_time); in e1000_setup_link_ich8lan()
5015 if ((hw->phy.type == e1000_phy_82578) || in e1000_setup_link_ich8lan()
5016 (hw->phy.type == e1000_phy_82579) || in e1000_setup_link_ich8lan()
5017 (hw->phy.type == e1000_phy_i217) || in e1000_setup_link_ich8lan()
5018 (hw->phy.type == e1000_phy_82577)) { in e1000_setup_link_ich8lan()
5019 ew32(FCRTV_PCH, hw->fc.refresh_time); in e1000_setup_link_ich8lan()
5021 ret_val = e1e_wphy(hw, PHY_REG(BM_PORT_CTRL_PAGE, 27), in e1000_setup_link_ich8lan()
5022 hw->fc.pause_time); in e1000_setup_link_ich8lan()
5027 return e1000e_set_fc_watermarks(hw); in e1000_setup_link_ich8lan()
5032 * @hw: pointer to the HW structure
5038 static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw) in e1000_setup_copper_link_ich8lan() argument
5053 ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_TIMEOUTS, 0xFFFF); in e1000_setup_copper_link_ich8lan()
5056 ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, in e1000_setup_copper_link_ich8lan()
5061 ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_INBAND_PARAM, in e1000_setup_copper_link_ich8lan()
5066 switch (hw->phy.type) { in e1000_setup_copper_link_ich8lan()
5068 ret_val = e1000e_copper_link_setup_igp(hw); in e1000_setup_copper_link_ich8lan()
5074 ret_val = e1000e_copper_link_setup_m88(hw); in e1000_setup_copper_link_ich8lan()
5080 ret_val = e1000_copper_link_setup_82577(hw); in e1000_setup_copper_link_ich8lan()
5085 ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, ®_data); in e1000_setup_copper_link_ich8lan()
5091 switch (hw->phy.mdix) { in e1000_setup_copper_link_ich8lan()
5103 ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data); in e1000_setup_copper_link_ich8lan()
5111 return e1000e_setup_copper_link(hw); in e1000_setup_copper_link_ich8lan()
5116 * @hw: pointer to the HW structure
5122 static s32 e1000_setup_copper_link_pch_lpt(struct e1000_hw *hw) in e1000_setup_copper_link_pch_lpt() argument
5132 ret_val = e1000_copper_link_setup_82577(hw); in e1000_setup_copper_link_pch_lpt()
5136 return e1000e_setup_copper_link(hw); in e1000_setup_copper_link_pch_lpt()
5141 * @hw: pointer to the HW structure
5149 static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed, in e1000_get_link_up_info_ich8lan() argument
5154 ret_val = e1000e_get_speed_and_duplex_copper(hw, speed, duplex); in e1000_get_link_up_info_ich8lan()
5158 if ((hw->mac.type == e1000_ich8lan) && in e1000_get_link_up_info_ich8lan()
5159 (hw->phy.type == e1000_phy_igp_3) && (*speed == SPEED_1000)) { in e1000_get_link_up_info_ich8lan()
5160 ret_val = e1000_kmrn_lock_loss_workaround_ich8lan(hw); in e1000_get_link_up_info_ich8lan()
5168 * @hw: pointer to the HW structure
5181 static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw) in e1000_kmrn_lock_loss_workaround_ich8lan() argument
5183 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_kmrn_lock_loss_workaround_ich8lan()
5196 ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link); in e1000_kmrn_lock_loss_workaround_ich8lan()
5202 ret_val = e1e_rphy(hw, IGP3_KMRN_DIAG, &data); in e1000_kmrn_lock_loss_workaround_ich8lan()
5206 ret_val = e1e_rphy(hw, IGP3_KMRN_DIAG, &data); in e1000_kmrn_lock_loss_workaround_ich8lan()
5215 e1000_phy_hw_reset(hw); in e1000_kmrn_lock_loss_workaround_ich8lan()
5227 e1000e_gig_downshift_workaround_ich8lan(hw); in e1000_kmrn_lock_loss_workaround_ich8lan()
5235 * @hw: pointer to the HW structure
5241 void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw, in e1000e_set_kmrn_lock_loss_workaround_ich8lan() argument
5244 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000e_set_kmrn_lock_loss_workaround_ich8lan()
5246 if (hw->mac.type != e1000_ich8lan) { in e1000e_set_kmrn_lock_loss_workaround_ich8lan()
5256 * @hw: pointer to the HW structure
5264 void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw) in e1000e_igp3_phy_powerdown_workaround_ich8lan() argument
5270 if (hw->phy.type != e1000_phy_igp_3) in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5284 if (hw->mac.type == e1000_ich8lan) in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5285 e1000e_gig_downshift_workaround_ich8lan(hw); in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5288 e1e_rphy(hw, IGP3_VR_CTRL, &data); in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5290 e1e_wphy(hw, IGP3_VR_CTRL, data | IGP3_VR_CTRL_MODE_SHUTDOWN); in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5293 e1e_rphy(hw, IGP3_VR_CTRL, &data); in e1000e_igp3_phy_powerdown_workaround_ich8lan()
5307 * @hw: pointer to the HW structure
5315 void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw) in e1000e_gig_downshift_workaround_ich8lan() argument
5320 if ((hw->mac.type != e1000_ich8lan) || (hw->phy.type == e1000_phy_ife)) in e1000e_gig_downshift_workaround_ich8lan()
5323 ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET, in e1000e_gig_downshift_workaround_ich8lan()
5328 ret_val = e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET, in e1000e_gig_downshift_workaround_ich8lan()
5333 e1000e_write_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET, reg_data); in e1000e_gig_downshift_workaround_ich8lan()
5338 * @hw: pointer to the HW structure
5350 void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw) in e1000_suspend_workarounds_ich8lan() argument
5352 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; in e1000_suspend_workarounds_ich8lan()
5359 if (hw->phy.type == e1000_phy_i217) { in e1000_suspend_workarounds_ich8lan()
5360 u16 phy_reg, device_id = hw->adapter->pdev->device; in e1000_suspend_workarounds_ich8lan()
5366 (hw->mac.type >= e1000_pch_spt)) { in e1000_suspend_workarounds_ich8lan()
5372 ret_val = hw->phy.ops.acquire(hw); in e1000_suspend_workarounds_ich8lan()
5380 e1000_read_emi_reg_locked(hw, in e1000_suspend_workarounds_ich8lan()
5394 (hw->phy.autoneg_advertised & ADVERTISE_100_FULL)) { in e1000_suspend_workarounds_ich8lan()
5399 e1e_rphy_locked(hw, in e1000_suspend_workarounds_ich8lan()
5402 e1e_wphy_locked(hw, in e1000_suspend_workarounds_ich8lan()
5416 e1e_rphy_locked(hw, I217_PROXY_CTRL, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5418 e1e_wphy_locked(hw, I217_PROXY_CTRL, phy_reg); in e1000_suspend_workarounds_ich8lan()
5423 e1e_rphy_locked(hw, I217_SxCTRL, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5425 e1e_wphy_locked(hw, I217_SxCTRL, phy_reg); in e1000_suspend_workarounds_ich8lan()
5428 e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5430 e1e_wphy_locked(hw, I217_MEMPWR, phy_reg); in e1000_suspend_workarounds_ich8lan()
5436 e1e_rphy_locked(hw, I217_CGFREG, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5438 e1e_wphy_locked(hw, I217_CGFREG, phy_reg); in e1000_suspend_workarounds_ich8lan()
5441 hw->phy.ops.release(hw); in e1000_suspend_workarounds_ich8lan()
5446 if (hw->mac.type == e1000_ich8lan) in e1000_suspend_workarounds_ich8lan()
5447 e1000e_gig_downshift_workaround_ich8lan(hw); in e1000_suspend_workarounds_ich8lan()
5449 if (hw->mac.type >= e1000_pchlan) { in e1000_suspend_workarounds_ich8lan()
5450 e1000_oem_bits_config_ich8lan(hw, false); in e1000_suspend_workarounds_ich8lan()
5453 if (hw->mac.type == e1000_pchlan) in e1000_suspend_workarounds_ich8lan()
5454 e1000e_phy_hw_reset_generic(hw); in e1000_suspend_workarounds_ich8lan()
5456 ret_val = hw->phy.ops.acquire(hw); in e1000_suspend_workarounds_ich8lan()
5459 e1000_write_smbus_addr(hw); in e1000_suspend_workarounds_ich8lan()
5460 hw->phy.ops.release(hw); in e1000_suspend_workarounds_ich8lan()
5466 * @hw: pointer to the HW structure
5474 void e1000_resume_workarounds_pchlan(struct e1000_hw *hw) in e1000_resume_workarounds_pchlan() argument
5478 if (hw->mac.type < e1000_pch2lan) in e1000_resume_workarounds_pchlan()
5481 ret_val = e1000_init_phy_workarounds_pchlan(hw); in e1000_resume_workarounds_pchlan()
5492 if (hw->phy.type == e1000_phy_i217) { in e1000_resume_workarounds_pchlan()
5495 ret_val = hw->phy.ops.acquire(hw); in e1000_resume_workarounds_pchlan()
5502 e1e_rphy_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg); in e1000_resume_workarounds_pchlan()
5504 e1e_wphy_locked(hw, I217_LPI_GPIO_CTRL, phy_reg); in e1000_resume_workarounds_pchlan()
5510 ret_val = e1e_rphy_locked(hw, I217_MEMPWR, &phy_reg); in e1000_resume_workarounds_pchlan()
5514 e1e_wphy_locked(hw, I217_MEMPWR, phy_reg); in e1000_resume_workarounds_pchlan()
5517 e1e_wphy_locked(hw, I217_PROXY_CTRL, 0); in e1000_resume_workarounds_pchlan()
5520 ret_val = e1e_rphy_locked(hw, I217_CGFREG, &phy_reg); in e1000_resume_workarounds_pchlan()
5524 e1e_wphy_locked(hw, I217_CGFREG, phy_reg); in e1000_resume_workarounds_pchlan()
5528 hw->phy.ops.release(hw); in e1000_resume_workarounds_pchlan()
5534 * @hw: pointer to the HW structure
5538 static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw) in e1000_cleanup_led_ich8lan() argument
5540 if (hw->phy.type == e1000_phy_ife) in e1000_cleanup_led_ich8lan()
5541 return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, 0); in e1000_cleanup_led_ich8lan()
5543 ew32(LEDCTL, hw->mac.ledctl_default); in e1000_cleanup_led_ich8lan()
5549 * @hw: pointer to the HW structure
5553 static s32 e1000_led_on_ich8lan(struct e1000_hw *hw) in e1000_led_on_ich8lan() argument
5555 if (hw->phy.type == e1000_phy_ife) in e1000_led_on_ich8lan()
5556 return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_led_on_ich8lan()
5559 ew32(LEDCTL, hw->mac.ledctl_mode2); in e1000_led_on_ich8lan()
5565 * @hw: pointer to the HW structure
5569 static s32 e1000_led_off_ich8lan(struct e1000_hw *hw) in e1000_led_off_ich8lan() argument
5571 if (hw->phy.type == e1000_phy_ife) in e1000_led_off_ich8lan()
5572 return e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_led_off_ich8lan()
5576 ew32(LEDCTL, hw->mac.ledctl_mode1); in e1000_led_off_ich8lan()
5582 * @hw: pointer to the HW structure
5586 static s32 e1000_setup_led_pchlan(struct e1000_hw *hw) in e1000_setup_led_pchlan() argument
5588 return e1e_wphy(hw, HV_LED_CONFIG, (u16)hw->mac.ledctl_mode1); in e1000_setup_led_pchlan()
5593 * @hw: pointer to the HW structure
5597 static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw) in e1000_cleanup_led_pchlan() argument
5599 return e1e_wphy(hw, HV_LED_CONFIG, (u16)hw->mac.ledctl_default); in e1000_cleanup_led_pchlan()
5604 * @hw: pointer to the HW structure
5608 static s32 e1000_led_on_pchlan(struct e1000_hw *hw) in e1000_led_on_pchlan() argument
5610 u16 data = (u16)hw->mac.ledctl_mode2; in e1000_led_on_pchlan()
5629 return e1e_wphy(hw, HV_LED_CONFIG, data); in e1000_led_on_pchlan()
5634 * @hw: pointer to the HW structure
5638 static s32 e1000_led_off_pchlan(struct e1000_hw *hw) in e1000_led_off_pchlan() argument
5640 u16 data = (u16)hw->mac.ledctl_mode1; in e1000_led_off_pchlan()
5659 return e1e_wphy(hw, HV_LED_CONFIG, data); in e1000_led_off_pchlan()
5664 * @hw: pointer to the HW structure
5674 static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw) in e1000_get_cfg_done_ich8lan() argument
5680 e1000e_get_cfg_done_generic(hw); in e1000_get_cfg_done_ich8lan()
5683 if (hw->mac.type >= e1000_ich10lan) { in e1000_get_cfg_done_ich8lan()
5684 e1000_lan_init_done_ich8lan(hw); in e1000_get_cfg_done_ich8lan()
5686 ret_val = e1000e_get_auto_rd_done(hw); in e1000_get_cfg_done_ich8lan()
5705 if (hw->mac.type <= e1000_ich9lan) { in e1000_get_cfg_done_ich8lan()
5707 (hw->phy.type == e1000_phy_igp_3)) { in e1000_get_cfg_done_ich8lan()
5708 e1000e_phy_init_script_igp3(hw); in e1000_get_cfg_done_ich8lan()
5711 if (e1000_valid_nvm_bank_detect_ich8lan(hw, &bank)) { in e1000_get_cfg_done_ich8lan()
5723 * @hw: pointer to the HW structure
5728 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw) in e1000_power_down_phy_copper_ich8lan() argument
5731 if (!(hw->mac.ops.check_mng_mode(hw) || in e1000_power_down_phy_copper_ich8lan()
5732 hw->phy.ops.check_reset_block(hw))) in e1000_power_down_phy_copper_ich8lan()
5733 e1000_power_down_phy_copper(hw); in e1000_power_down_phy_copper_ich8lan()
5738 * @hw: pointer to the HW structure
5743 static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw) in e1000_clear_hw_cntrs_ich8lan() argument
5748 e1000e_clear_hw_cntrs_base(hw); in e1000_clear_hw_cntrs_ich8lan()
5765 if ((hw->phy.type == e1000_phy_82578) || in e1000_clear_hw_cntrs_ich8lan()
5766 (hw->phy.type == e1000_phy_82579) || in e1000_clear_hw_cntrs_ich8lan()
5767 (hw->phy.type == e1000_phy_i217) || in e1000_clear_hw_cntrs_ich8lan()
5768 (hw->phy.type == e1000_phy_82577)) { in e1000_clear_hw_cntrs_ich8lan()
5769 ret_val = hw->phy.ops.acquire(hw); in e1000_clear_hw_cntrs_ich8lan()
5772 ret_val = hw->phy.ops.set_page(hw, in e1000_clear_hw_cntrs_ich8lan()
5776 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5777 hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5778 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5779 hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5780 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5781 hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5782 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5783 hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5784 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5785 hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5786 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5787 hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5788 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5789 hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
5791 hw->phy.ops.release(hw); in e1000_clear_hw_cntrs_ich8lan()