Lines Matching refs:inl
687 imr = inl(DE4X5_IMR);\
698 imr = inl(DE4X5_IMR);\
707 omr = inl(DE4X5_OMR);\
713 omr = inl(DE4X5_OMR);\
1064 i=inl(DE4X5_BMR);\
1070 for (i=0;i<5;i++) {inl(DE4X5_BMR); mdelay(1);}\
1114 if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) { in de4x5_hw_init()
1343 printk("\tsts: 0x%08x\n", inl(DE4X5_STS)); in de4x5_open()
1344 printk("\tbmr: 0x%08x\n", inl(DE4X5_BMR)); in de4x5_open()
1345 printk("\timr: 0x%08x\n", inl(DE4X5_IMR)); in de4x5_open()
1346 printk("\tomr: 0x%08x\n", inl(DE4X5_OMR)); in de4x5_open()
1347 printk("\tsisr: 0x%08x\n", inl(DE4X5_SISR)); in de4x5_open()
1348 printk("\tsicr: 0x%08x\n", inl(DE4X5_SICR)); in de4x5_open()
1349 printk("\tstrr: 0x%08x\n", inl(DE4X5_STRR)); in de4x5_open()
1350 printk("\tsigr: 0x%08x\n", inl(DE4X5_SIGR)); in de4x5_open()
1405 omr = inl(DE4X5_OMR) & ~OMR_PR; /* Turn off promiscuous mode */ in de4x5_sw_reset()
1443 inl(DE4X5_STS)); in de4x5_sw_reset()
1488 …08x\n OMR:%08x\n Stale skb: %s\n",dev->name, inl(DE4X5_STS), netif_queue_stopped(dev), inl(DE4X5_… in de4x5_queue_pkt()
1556 sts = inl(DE4X5_STS); /* Read IRQ status */ in de4x5_interrupt()
1613 if (inl(DE4X5_MFC) & MFC_FOCM) { in de4x5_rx()
1775 omr = inl(DE4X5_OMR); in de4x5_txur()
1779 while (inl(DE4X5_STS) & STS_TS); in de4x5_txur()
1798 omr = inl(DE4X5_OMR); in de4x5_rx_ovfc()
1800 while (inl(DE4X5_STS) & STS_RS); in de4x5_rx_ovfc()
1825 dev->name, inl(DE4X5_STS)); in de4x5_close()
1854 lp->stats.rx_missed_errors = (int)(inl(DE4X5_MFC) & (MFC_OVFL | MFC_CNTR)); in de4x5_get_stats()
1926 omr = inl(DE4X5_OMR); in set_multicast_list()
1958 omr = inl(DE4X5_OMR); in SetMulticastFilter()
2023 cfid = (u32) inl(PCI_CFID); in de4x5_eisa_probe()
2024 lp->cfrv = (u_short) inl(PCI_CFRV); in de4x5_eisa_probe()
2367 inl(DE4X5_MFC); /* Zero the lost frames counter */ in autoconf_media()
2573 omr = inl(DE4X5_OMR);/* Set up full duplex for the autonegotiate */ in dc21041_autoconf()
2620 omr = inl(DE4X5_OMR); /* Set up half duplex for TP */ in dc21041_autoconf()
2630 if (inl(DE4X5_SISR) & SISR_NRA) { in dc21041_autoconf()
2654 omr = inl(DE4X5_OMR); /* Set up half duplex for AUI */ in dc21041_autoconf()
2663 if (!(inl(DE4X5_SISR) & SISR_SRA) && (lp->autosense == AUTO)) { in dc21041_autoconf()
2685 omr = inl(DE4X5_OMR); /* Set up half duplex for BNC */ in dc21041_autoconf()
2724 omr = inl(DE4X5_OMR); /* Set up full duplex for the autonegotiate */ in dc21041_autoconf()
3033 omr = inl(DE4X5_OMR); /* Set up half duplex for AUI */ in dc2114x_autoconf()
3042 if (!(inl(DE4X5_SISR) & SISR_SRA) && (lp->autosense == AUTO)) { in dc2114x_autoconf()
3064 omr = inl(DE4X5_OMR); /* Set up half duplex for BNC */ in dc2114x_autoconf()
3341 sts = inl(DE4X5_STS); in test_media()
3346 csr12 = inl(DE4X5_SISR); in test_media()
3351 sts = inl(DE4X5_STS) & ~TIMER_CB; in test_media()
3373 sisr = (inl(DE4X5_SISR) & ~TIMER_CB) & (SISR_LKF | SISR_NCR); in test_tp()
3482 return (lp->chipset == DC21143) ? (~inl(DE4X5_SISR)&SISR_LS100) : 0; in is_spd_100()
3505 return (lp->chipset == DC21143) ? (~inl(DE4X5_SISR)&SISR_LS100) : 0; in is_100_up()
3527 (~inl(DE4X5_SISR)&SISR_LS10): in is_10_up()
3544 return (inl(DE4X5_SISR) & SISR_LPN) >> 12; in is_anc_capable()
3570 sisr = inl(DE4X5_SISR); in ping_media()
3737 lp->cache.csr0 = inl(DE4X5_BMR); in de4x5_cache_state()
3738 lp->cache.csr6 = (inl(DE4X5_OMR) & ~(OMR_ST | OMR_SR)); in de4x5_cache_state()
3739 lp->cache.csr7 = inl(DE4X5_IMR); in de4x5_cache_state()
3797 sts = inl(DE4X5_STS); in test_ans()
3801 ans = inl(DE4X5_SISR) & SISR_ANS; in test_ans()
3802 sts = inl(DE4X5_STS) & ~TIMER_CB; in test_ans()
3820 if (inl(DE4X5_OMR) & OMR_SR) { /* Only unmask if TX/RX is enabled */ in de4x5_setup_intr()
3823 sts = inl(DE4X5_STS); /* Reset any pending (stale) interrupts */ in de4x5_setup_intr()
4041 while ((tmp = inl(DE4X5_APROM)) < 0); in get_hw_addr()
4044 while ((tmp = inl(DE4X5_APROM)) < 0); in get_hw_addr()
4067 while ((tmp = inl(DE4X5_APROM)) < 0); in get_hw_addr()
4069 while ((tmp = inl(DE4X5_APROM)) < 0); in get_hw_addr()
4286 tmp = inl(addr); in getfrom_srom()
4917 return (inl(ioaddr) >> 19) & 1; in getfrom_mii()
5087 omr = (inl(DE4X5_OMR) & ~(OMR_PS | OMR_HBD | OMR_TTM | OMR_PCS | OMR_SCR | in de4x5_switch_mac_port()
5108 inl(DE4X5_MFC); in de4x5_switch_mac_port()
5133 return inl(DE4X5_GEP); in gep_rd()
5135 return inl(DE4X5_SIGR) & 0x000fffff; in gep_rd()
5416 omr = inl(DE4X5_OMR); in de4x5_ioctl()
5440 tmp.addr[0] = inl(DE4X5_OMR); in de4x5_ioctl()
5452 tmp.lval[0] = inl(DE4X5_STS); j+=4; in de4x5_ioctl()
5453 tmp.lval[1] = inl(DE4X5_BMR); j+=4; in de4x5_ioctl()
5454 tmp.lval[2] = inl(DE4X5_IMR); j+=4; in de4x5_ioctl()
5455 tmp.lval[3] = inl(DE4X5_OMR); j+=4; in de4x5_ioctl()
5456 tmp.lval[4] = inl(DE4X5_SISR); j+=4; in de4x5_ioctl()
5457 tmp.lval[5] = inl(DE4X5_SICR); j+=4; in de4x5_ioctl()
5458 tmp.lval[6] = inl(DE4X5_STRR); j+=4; in de4x5_ioctl()
5459 tmp.lval[7] = inl(DE4X5_SIGR); j+=4; in de4x5_ioctl()