Lines Matching refs:GRC_MODE
3554 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3555 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
3565 grc_mode = tr32(GRC_MODE); in tg3_nvram_write_block()
3566 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); in tg3_nvram_write_block()
6445 tg3_rd32_loop(tp, regs, GRC_MODE, 0x4c); in tg3_dump_legacy_regs()
9255 tw32(GRC_MODE, tp->grc_mode); in tg3_chip_reset()
9936 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9940 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9946 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9951 u32 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9955 tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL); in tg3_reset_hw()
9962 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
9973 grc_mode = tr32(GRC_MODE); in tg3_reset_hw()
9977 tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL); in tg3_reset_hw()
9985 tw32(GRC_MODE, grc_mode); in tg3_reset_hw()
10079 tw32(GRC_MODE, tp->grc_mode | val); in tg3_reset_hw()
16825 val = tr32(GRC_MODE); in tg3_get_invariants()
16836 tw32(GRC_MODE, val | tp->grc_mode); in tg3_get_invariants()