47 #define ei_outb(_v, _a) writeb(_v, ax_convert_addr(_a))  macro
50 #define ei_outb_p(_v, _a) ei_outb(_v, _a)
121 	ei_outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, ioaddr + E8390_CMD);  in ax_initial_check()
123 	ei_outb(0xff, ioaddr + 0x0d);  in ax_initial_check()
124 	ei_outb(E8390_NODMA + E8390_PAGE0, ioaddr + E8390_CMD);  in ax_initial_check()
127 		ei_outb(reg0, ioaddr);  in ax_initial_check()
128 		ei_outb(regd, ioaddr + 0x0d);	/* Restore the old values. */  in ax_initial_check()
147 	ei_outb(ei_inb(addr + NE_RESET), addr + NE_RESET);  in ax_reset_8390()
160 	ei_outb(ENISR_RESET, addr + EN0_ISR);	/* Ack intr. */  in ax_reset_8390()
195 	ei_outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);  in ax_get_8390_hdr()
196 	ei_outb(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);  in ax_get_8390_hdr()
197 	ei_outb(0, nic_base + EN0_RCNTHI);  in ax_get_8390_hdr()
198 	ei_outb(0, nic_base + EN0_RSARLO);		/* On page boundary */  in ax_get_8390_hdr()
199 	ei_outb(ring_page, nic_base + EN0_RSARHI);  in ax_get_8390_hdr()
200 	ei_outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ax_get_8390_hdr()
209 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ax_get_8390_hdr()
241 	ei_outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base + NE_CMD);  in ax_block_input()
242 	ei_outb(count & 0xff, nic_base + EN0_RCNTLO);  in ax_block_input()
243 	ei_outb(count >> 8, nic_base + EN0_RCNTHI);  in ax_block_input()
244 	ei_outb(ring_offset & 0xff, nic_base + EN0_RSARLO);  in ax_block_input()
245 	ei_outb(ring_offset >> 8, nic_base + EN0_RSARHI);  in ax_block_input()
246 	ei_outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);  in ax_block_input()
286 	ei_outb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);  in ax_block_output()
288 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);  in ax_block_output()
291 	ei_outb(count & 0xff, nic_base + EN0_RCNTLO);  in ax_block_output()
292 	ei_outb(count >> 8, nic_base + EN0_RCNTHI);  in ax_block_output()
293 	ei_outb(0x00, nic_base + EN0_RSARLO);  in ax_block_output()
294 	ei_outb(start_page, nic_base + EN0_RSARHI);  in ax_block_output()
296 	ei_outb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);  in ax_block_output()
313 	ei_outb(ENISR_RDC, nic_base + EN0_ISR);	/* Ack intr. */  in ax_block_output()
397 	ei_outb(reg_gpoc, ei_local->mem + EI_SHIFT(0x17));  in ax_phy_switch()
409 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_mdc()
421 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_dir()
433 	ei_outb(ax->reg_memr, ax->addr_memr);  in ax_bb_set_data()
630 	ei_outb(reg, ei_local->mem + AX_MEMR);  in ax_eeprom_register_write()
659 	ei_outb(E8390_NODMA + E8390_PAGE0 + E8390_STOP, ioaddr + E8390_CMD);  in ax_initial_setup()
662 	ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG);  in ax_initial_setup()
663 	ei_outb(ax->plat->gpoc_val, ioaddr + EI_SHIFT(0x17));  in ax_initial_setup()
697 		ei_outb(6, ioaddr + EN0_RCNTLO);  in ax_init_dev()
698 		ei_outb(0, ioaddr + EN0_RCNTHI);  in ax_init_dev()
699 		ei_outb(0, ioaddr + EN0_RSARLO);  in ax_init_dev()
700 		ei_outb(0, ioaddr + EN0_RSARHI);  in ax_init_dev()
701 		ei_outb(E8390_RREAD + E8390_START, ioaddr + NE_CMD);  in ax_init_dev()
706 		ei_outb(ENISR_RDC, ioaddr + EN0_ISR);	/* Ack intr. */  in ax_init_dev()
734 		ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG);  in ax_init_dev()
744 		ei_outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP,  in ax_init_dev()