dsa/mv88e6xxx/global1.h

269 int mv88e6xxx_g1_read(struct mv88e6xxx_chip *chip, int reg, u16 *val);
270 int mv88e6xxx_g1_write(struct mv88e6xxx_chip *chip, int reg, u16 val);
271 int mv88e6xxx_g1_wait_bit(struct mv88e6xxx_chip *chip, int reg, int
273 int mv88e6xxx_g1_wait_mask(struct mv88e6xxx_chip *chip, int reg,
276 int mv88e6xxx_g1_set_switch_mac(struct mv88e6xxx_chip *chip, u8 *addr);
278 int mv88e6185_g1_reset(struct mv88e6xxx_chip *chip);
279 int mv88e6352_g1_reset(struct mv88e6xxx_chip *chip);
280 int mv88e6250_g1_reset(struct mv88e6xxx_chip *chip);
281 void mv88e6xxx_g1_wait_eeprom_done(struct mv88e6xxx_chip *chip);
283 int mv88e6185_g1_ppu_enable(struct mv88e6xxx_chip *chip);
284 int mv88e6185_g1_ppu_disable(struct mv88e6xxx_chip *chip);
286 int mv88e6185_g1_set_max_frame_size(struct mv88e6xxx_chip *chip, int mtu);
288 int mv88e6xxx_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
289 int mv88e6320_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
290 int mv88e6390_g1_stats_snapshot(struct mv88e6xxx_chip *chip, int port);
291 int mv88e6095_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
292 int mv88e6390_g1_stats_set_histogram(struct mv88e6xxx_chip *chip);
293 void mv88e6xxx_g1_stats_read(struct mv88e6xxx_chip *chip, int stat, u32 *val);
294 int mv88e6xxx_g1_stats_clear(struct mv88e6xxx_chip *chip);
295 int mv88e6095_g1_set_egress_port(struct mv88e6xxx_chip *chip,
298 int mv88e6390_g1_set_egress_port(struct mv88e6xxx_chip *chip,
301 int mv88e6095_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
302 int mv88e6390_g1_set_cpu_port(struct mv88e6xxx_chip *chip, int port);
303 int mv88e6390_g1_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip);
305 int mv88e6085_g1_ip_pri_map(struct mv88e6xxx_chip *chip);
307 int mv88e6085_g1_ieee_pri_map(struct mv88e6xxx_chip *chip);
308 int mv88e6250_g1_ieee_pri_map(struct mv88e6xxx_chip *chip);
310 int mv88e6185_g1_set_cascade_port(struct mv88e6xxx_chip *chip, int port);
312 int mv88e6085_g1_rmu_disable(struct mv88e6xxx_chip *chip);
313 int mv88e6352_g1_rmu_disable(struct mv88e6xxx_chip *chip);
314 int mv88e6390_g1_rmu_disable(struct mv88e6xxx_chip *chip);
316 int mv88e6xxx_g1_set_device_number(struct mv88e6xxx_chip *chip, int index);
318 int mv88e6xxx_g1_atu_set_learn2all(struct mv88e6xxx_chip *chip, bool learn2all);
319 int mv88e6xxx_g1_atu_set_age_time(struct mv88e6xxx_chip *chip,
321 int mv88e6xxx_g1_atu_getnext(struct mv88e6xxx_chip *chip, u16 fid,
323 int mv88e6xxx_g1_atu_loadpurge(struct mv88e6xxx_chip *chip, u16 fid,
325 int mv88e6xxx_g1_atu_flush(struct mv88e6xxx_chip *chip, u16 fid, bool all);
326 int mv88e6xxx_g1_atu_remove(struct mv88e6xxx_chip *chip, u16 fid, int port,
328 int mv88e6xxx_g1_atu_prob_irq_setup(struct mv88e6xxx_chip *chip);
329 void mv88e6xxx_g1_atu_prob_irq_free(struct mv88e6xxx_chip *chip);
330 int mv88e6165_g1_atu_get_hash(struct mv88e6xxx_chip *chip, u8 *hash);
331 int mv88e6165_g1_atu_set_hash(struct mv88e6xxx_chip *chip, u8 hash);
333 int mv88e6185_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
335 int mv88e6185_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
337 int mv88e6250_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
339 int mv88e6250_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
341 int mv88e6352_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
343 int mv88e6352_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
345 int mv88e6390_g1_vtu_getnext(struct mv88e6xxx_chip *chip,
347 int mv88e6390_g1_vtu_loadpurge(struct mv88e6xxx_chip *chip,
349 int mv88e6xxx_g1_vtu_flush(struct mv88e6xxx_chip *chip);
350 int mv88e6xxx_g1_vtu_prob_irq_setup(struct mv88e6xxx_chip *chip);
351 void mv88e6xxx_g1_vtu_prob_irq_free(struct mv88e6xxx_chip *chip);
352 int mv88e6xxx_g1_atu_get_next(struct mv88e6xxx_chip *chip, u16 fid);