1198 	u32 reg_cbt, reg_fdctrl;  in flexcan_set_bittiming_cbt()  local
1269 	reg_fdctrl = priv->read(&regs->fdctrl);  in flexcan_set_bittiming_cbt()
1270 	reg_fdctrl &= ~(FLEXCAN_FDCTRL_FDRATE |  in flexcan_set_bittiming_cbt()
1274 		reg_fdctrl |= FLEXCAN_FDCTRL_FDRATE;  in flexcan_set_bittiming_cbt()
1278 			reg_fdctrl &= ~FLEXCAN_FDCTRL_TDCEN;  in flexcan_set_bittiming_cbt()
1280 			reg_fdctrl |= FLEXCAN_FDCTRL_TDCEN |  in flexcan_set_bittiming_cbt()
1288 	netdev_dbg(dev, "writing fdctrl=0x%08x\n", reg_fdctrl);  in flexcan_set_bittiming_cbt()
1289 	priv->write(reg_fdctrl, &regs->fdctrl);  in flexcan_set_bittiming_cbt()
1479 		u32 reg_fdctrl;  in flexcan_chip_start()  local
1481 		reg_fdctrl = priv->read(&regs->fdctrl);  in flexcan_chip_start()
1482 		reg_fdctrl &= ~(FIELD_PREP(FLEXCAN_FDCTRL_MBDSR1, 0x3) |  in flexcan_chip_start()
1486 			reg_fdctrl |=  in flexcan_chip_start()
1492 			reg_fdctrl |=  in flexcan_chip_start()
1500 			   __func__, reg_fdctrl);  in flexcan_chip_start()
1501 		priv->write(reg_fdctrl, &regs->fdctrl);  in flexcan_chip_start()