Lines Matching refs:TXX9_NDFMCR
24 #define TXX9_NDFMCR 0x04 macro
114 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_write_buf()
116 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_WE, TXX9_NDFMCR); in txx9ndfmc_write_buf()
119 txx9ndfmc_write(dev, mcr, TXX9_NDFMCR); in txx9ndfmc_write_buf()
139 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_cmd_ctrl()
150 txx9ndfmc_write(dev, mcr, TXX9_NDFMCR); in txx9ndfmc_cmd_ctrl()
173 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc()
176 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc()
177 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_READ, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc()
184 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc()
212 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc()
215 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_RESET, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc()
216 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_OFF, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc()
217 txx9ndfmc_write(dev, mcr | TXX9_NDFMCR_ECC_ON, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc()
246 TXX9_NDFMCR_BSPRT : 0, TXX9_NDFMCR); in txx9ndfmc_initialize()