Lines Matching +full:auto +full:- +full:cmd12

1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
19 #include <linux/dma-mapping.h>
34 #include <linux/mmc/slot-gpio.h>
43 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
46 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
76 SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs()
103 if (host->flags & SDHCI_USE_ADMA) { in sdhci_dumpregs()
104 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_dumpregs()
116 if (host->ops->dump_vendor_regs) in sdhci_dumpregs()
117 host->ops->dump_vendor_regs(host); in sdhci_dumpregs()
147 host->v4_mode = true; in sdhci_enable_v4_mode()
154 return cmd->data || cmd->flags & MMC_RSP_BUSY; in sdhci_data_line_cmd()
161 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || in sdhci_set_card_detection()
162 !mmc_card_is_removable(host->mmc) || mmc_can_gpio_cd(host->mmc)) in sdhci_set_card_detection()
169 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_set_card_detection()
172 host->ier &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_set_card_detection()
175 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection()
176 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection()
191 if (host->bus_on) in sdhci_runtime_pm_bus_on()
193 host->bus_on = true; in sdhci_runtime_pm_bus_on()
194 pm_runtime_get_noresume(host->mmc->parent); in sdhci_runtime_pm_bus_on()
199 if (!host->bus_on) in sdhci_runtime_pm_bus_off()
201 host->bus_on = false; in sdhci_runtime_pm_bus_off()
202 pm_runtime_put_noidle(host->mmc->parent); in sdhci_runtime_pm_bus_off()
212 host->clock = 0; in sdhci_reset()
213 /* Reset-all turns off SD Bus Power */ in sdhci_reset()
214 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_reset()
229 mmc_hostname(host->mmc), (int)mask); in sdhci_reset()
240 if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { in sdhci_do_reset()
241 struct mmc_host *mmc = host->mmc; in sdhci_do_reset()
243 if (!mmc->ops->get_cd(mmc)) in sdhci_do_reset()
247 host->ops->reset(host, mask); in sdhci_do_reset()
250 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_do_reset()
251 if (host->ops->enable_dma) in sdhci_do_reset()
252 host->ops->enable_dma(host); in sdhci_do_reset()
256 host->preset_enabled = false; in sdhci_do_reset()
262 host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | in sdhci_set_default_irqs()
268 if (host->tuning_mode == SDHCI_TUNING_MODE_2 || in sdhci_set_default_irqs()
269 host->tuning_mode == SDHCI_TUNING_MODE_3) in sdhci_set_default_irqs()
270 host->ier |= SDHCI_INT_RETUNE; in sdhci_set_default_irqs()
272 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs()
273 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs()
281 if (host->version < SDHCI_SPEC_200) in sdhci_config_dma()
292 if (!(host->flags & SDHCI_REQ_USE_DMA)) in sdhci_config_dma()
296 if (host->flags & SDHCI_USE_ADMA) in sdhci_config_dma()
299 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_config_dma()
301 * If v4 mode, all supported DMA can be 64-bit addressing if in sdhci_config_dma()
302 * controller supports 64-bit system address, otherwise only in sdhci_config_dma()
303 * ADMA can support 64-bit addressing. in sdhci_config_dma()
305 if (host->v4_mode) { in sdhci_config_dma()
309 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_config_dma()
324 struct mmc_host *mmc = host->mmc; in sdhci_init()
332 if (host->v4_mode) in sdhci_init()
335 spin_lock_irqsave(&host->lock, flags); in sdhci_init()
337 spin_unlock_irqrestore(&host->lock, flags); in sdhci_init()
339 host->cqe_on = false; in sdhci_init()
343 host->clock = 0; in sdhci_init()
344 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_init()
350 u32 cd = host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_reinit()
361 if (cd != (host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT))) in sdhci_reinit()
362 mmc_detect_change(host->mmc, msecs_to_jiffies(200)); in sdhci_reinit()
369 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_activate()
381 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_deactivate()
396 spin_lock_irqsave(&host->lock, flags); in sdhci_led_control()
398 if (host->runtime_suspended) in sdhci_led_control()
406 spin_unlock_irqrestore(&host->lock, flags); in sdhci_led_control()
411 struct mmc_host *mmc = host->mmc; in sdhci_led_register()
413 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_register()
416 snprintf(host->led_name, sizeof(host->led_name), in sdhci_led_register()
419 host->led.name = host->led_name; in sdhci_led_register()
420 host->led.brightness = LED_OFF; in sdhci_led_register()
421 host->led.default_trigger = mmc_hostname(mmc); in sdhci_led_register()
422 host->led.brightness_set = sdhci_led_control; in sdhci_led_register()
424 return led_classdev_register(mmc_dev(mmc), &host->led); in sdhci_led_register()
429 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_unregister()
432 led_classdev_unregister(&host->led); in sdhci_led_unregister()
469 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_mod_timer()
470 mod_timer(&host->data_timer, timeout); in sdhci_mod_timer()
472 mod_timer(&host->timer, timeout); in sdhci_mod_timer()
477 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_del_timer()
478 del_timer(&host->data_timer); in sdhci_del_timer()
480 del_timer(&host->timer); in sdhci_del_timer()
485 return host->cmd || host->data_cmd; in sdhci_has_requests()
503 blksize = host->data->blksz; in sdhci_read_block_pio()
509 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_read_block_pio()
511 len = min(host->sg_miter.length, blksize); in sdhci_read_block_pio()
513 blksize -= len; in sdhci_read_block_pio()
514 host->sg_miter.consumed = len; in sdhci_read_block_pio()
516 buf = host->sg_miter.addr; in sdhci_read_block_pio()
528 chunk--; in sdhci_read_block_pio()
529 len--; in sdhci_read_block_pio()
533 sg_miter_stop(&host->sg_miter); in sdhci_read_block_pio()
547 blksize = host->data->blksz; in sdhci_write_block_pio()
554 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_write_block_pio()
556 len = min(host->sg_miter.length, blksize); in sdhci_write_block_pio()
558 blksize -= len; in sdhci_write_block_pio()
559 host->sg_miter.consumed = len; in sdhci_write_block_pio()
561 buf = host->sg_miter.addr; in sdhci_write_block_pio()
568 len--; in sdhci_write_block_pio()
578 sg_miter_stop(&host->sg_miter); in sdhci_write_block_pio()
587 if (host->blocks == 0) in sdhci_transfer_pio()
590 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
600 if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && in sdhci_transfer_pio()
601 (host->data->blocks == 1)) in sdhci_transfer_pio()
605 if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) in sdhci_transfer_pio()
608 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
613 host->blocks--; in sdhci_transfer_pio()
614 if (host->blocks == 0) in sdhci_transfer_pio()
630 if (data->host_cookie == COOKIE_PRE_MAPPED) in sdhci_pre_dma_transfer()
631 return data->sg_count; in sdhci_pre_dma_transfer()
634 if (host->bounce_buffer) { in sdhci_pre_dma_transfer()
635 unsigned int length = data->blksz * data->blocks; in sdhci_pre_dma_transfer()
637 if (length > host->bounce_buffer_size) { in sdhci_pre_dma_transfer()
639 mmc_hostname(host->mmc), length, in sdhci_pre_dma_transfer()
640 host->bounce_buffer_size); in sdhci_pre_dma_transfer()
641 return -EIO; in sdhci_pre_dma_transfer()
645 if (host->ops->copy_to_bounce_buffer) { in sdhci_pre_dma_transfer()
646 host->ops->copy_to_bounce_buffer(host, in sdhci_pre_dma_transfer()
649 sg_copy_to_buffer(data->sg, data->sg_len, in sdhci_pre_dma_transfer()
650 host->bounce_buffer, length); in sdhci_pre_dma_transfer()
654 dma_sync_single_for_device(host->mmc->parent, in sdhci_pre_dma_transfer()
655 host->bounce_addr, in sdhci_pre_dma_transfer()
656 host->bounce_buffer_size, in sdhci_pre_dma_transfer()
662 sg_count = dma_map_sg(mmc_dev(host->mmc), in sdhci_pre_dma_transfer()
663 data->sg, data->sg_len, in sdhci_pre_dma_transfer()
668 return -ENOSPC; in sdhci_pre_dma_transfer()
670 data->sg_count = sg_count; in sdhci_pre_dma_transfer()
671 data->host_cookie = cookie; in sdhci_pre_dma_transfer()
679 return kmap_atomic(sg_page(sg)) + sg->offset; in sdhci_kmap_atomic()
693 /* 32-bit and 64-bit descriptors have these members in same position */ in sdhci_adma_write_desc()
694 dma_desc->cmd = cpu_to_le16(cmd); in sdhci_adma_write_desc()
695 dma_desc->len = cpu_to_le16(len); in sdhci_adma_write_desc()
696 dma_desc->addr_lo = cpu_to_le32(lower_32_bits(addr)); in sdhci_adma_write_desc()
698 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_write_desc()
699 dma_desc->addr_hi = cpu_to_le32(upper_32_bits(addr)); in sdhci_adma_write_desc()
701 *desc += host->desc_sz; in sdhci_adma_write_desc()
709 if (host->ops->adma_write_desc) in __sdhci_adma_write_desc()
710 host->ops->adma_write_desc(host, desc, addr, len, cmd); in __sdhci_adma_write_desc()
719 /* 32-bit and 64-bit descriptors have 'cmd' in same position */ in sdhci_adma_mark_end()
720 dma_desc->cmd |= cpu_to_le16(ADMA2_END); in sdhci_adma_mark_end()
738 host->sg_count = sg_count; in sdhci_adma_table_pre()
740 desc = host->adma_table; in sdhci_adma_table_pre()
741 align = host->align_buffer; in sdhci_adma_table_pre()
743 align_addr = host->align_addr; in sdhci_adma_table_pre()
745 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_pre()
751 * be 32-bit aligned. If they aren't, then we use a bounce in sdhci_adma_table_pre()
755 offset = (SDHCI_ADMA2_ALIGN - (addr & SDHCI_ADMA2_MASK)) & in sdhci_adma_table_pre()
758 if (data->flags & MMC_DATA_WRITE) { in sdhci_adma_table_pre()
774 len -= offset; in sdhci_adma_table_pre()
788 WARN_ON((desc - host->adma_table) >= host->adma_table_sz); in sdhci_adma_table_pre()
791 if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { in sdhci_adma_table_pre()
793 if (desc != host->adma_table) { in sdhci_adma_table_pre()
794 desc -= host->desc_sz; in sdhci_adma_table_pre()
798 /* Add a terminating entry - nop, end, valid */ in sdhci_adma_table_pre()
812 if (data->flags & MMC_DATA_READ) { in sdhci_adma_table_post()
816 for_each_sg(data->sg, sg, host->sg_count, i) in sdhci_adma_table_post()
823 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, in sdhci_adma_table_post()
824 data->sg_len, DMA_FROM_DEVICE); in sdhci_adma_table_post()
826 align = host->align_buffer; in sdhci_adma_table_post()
828 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_post()
830 size = SDHCI_ADMA2_ALIGN - in sdhci_adma_table_post()
847 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_set_adma_addr()
853 if (host->bounce_buffer) in sdhci_sdma_address()
854 return host->bounce_addr; in sdhci_sdma_address()
856 return sg_dma_address(host->data->sg); in sdhci_sdma_address()
861 if (host->v4_mode) in sdhci_set_sdma_addr()
875 target_timeout = cmd->busy_timeout * 1000; in sdhci_target_timeout()
877 target_timeout = DIV_ROUND_UP(data->timeout_ns, 1000); in sdhci_target_timeout()
878 if (host->clock && data->timeout_clks) { in sdhci_target_timeout()
882 * data->timeout_clks is in units of clock cycles. in sdhci_target_timeout()
883 * host->clock is in Hz. target_timeout is in us. in sdhci_target_timeout()
886 val = 1000000ULL * data->timeout_clks; in sdhci_target_timeout()
887 if (do_div(val, host->clock)) in sdhci_target_timeout()
899 struct mmc_data *data = cmd->data; in sdhci_calc_sw_timeout()
900 struct mmc_host *mmc = host->mmc; in sdhci_calc_sw_timeout()
901 struct mmc_ios *ios = &mmc->ios; in sdhci_calc_sw_timeout()
902 unsigned char bus_width = 1 << ios->bus_width; in sdhci_calc_sw_timeout()
912 blksz = data->blksz; in sdhci_calc_sw_timeout()
913 freq = host->mmc->actual_clock ? : host->clock; in sdhci_calc_sw_timeout()
919 host->data_timeout = data->blocks * target_timeout + in sdhci_calc_sw_timeout()
922 host->data_timeout = target_timeout; in sdhci_calc_sw_timeout()
925 if (host->data_timeout) in sdhci_calc_sw_timeout()
926 host->data_timeout += MMC_CMD_TRANSFER_TIME; in sdhci_calc_sw_timeout()
941 * longer to time out, but that's much better than having a too-short in sdhci_calc_timeout()
944 if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) in sdhci_calc_timeout()
951 data = cmd->data; in sdhci_calc_timeout()
953 if (!data && !cmd->busy_timeout) in sdhci_calc_timeout()
965 * (2) host->timeout_clk < 2^16 in sdhci_calc_timeout()
970 current_timeout = (1 << 13) * 1000 / host->timeout_clk; in sdhci_calc_timeout()
979 if (!(host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT)) in sdhci_calc_timeout()
981 count, cmd->opcode); in sdhci_calc_timeout()
995 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_irqs()
996 host->ier = (host->ier & ~pio_irqs) | dma_irqs; in sdhci_set_transfer_irqs()
998 host->ier = (host->ier & ~dma_irqs) | pio_irqs; in sdhci_set_transfer_irqs()
1000 if (host->flags & (SDHCI_AUTO_CMD23 | SDHCI_AUTO_CMD12)) in sdhci_set_transfer_irqs()
1001 host->ier |= SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1003 host->ier &= ~SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1005 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs()
1006 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_transfer_irqs()
1012 host->ier |= SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1014 host->ier &= ~SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1015 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_data_timeout_irq()
1016 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_data_timeout_irq()
1026 host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT) { in __sdhci_set_timeout()
1029 } else if (!(host->ier & SDHCI_INT_DATA_TIMEOUT)) { in __sdhci_set_timeout()
1039 if (host->ops->set_timeout) in sdhci_set_timeout()
1040 host->ops->set_timeout(host, cmd); in sdhci_set_timeout()
1048 WARN_ON(host->data); in sdhci_initialize_data()
1051 BUG_ON(data->blksz * data->blocks > 524288); in sdhci_initialize_data()
1052 BUG_ON(data->blksz > host->mmc->max_blk_size); in sdhci_initialize_data()
1053 BUG_ON(data->blocks > 65535); in sdhci_initialize_data()
1055 host->data = data; in sdhci_initialize_data()
1056 host->data_early = 0; in sdhci_initialize_data()
1057 host->data->bytes_xfered = 0; in sdhci_initialize_data()
1065 SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz), in sdhci_set_block_info()
1068 * For Version 4.10 onwards, if v4 mode is enabled, 32-bit Block Count in sdhci_set_block_info()
1069 * can be supported, in that case 16-bit block count register must be 0. in sdhci_set_block_info()
1071 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_set_block_info()
1072 (host->quirks2 & SDHCI_QUIRK2_USE_32BIT_BLK_CNT)) { in sdhci_set_block_info()
1075 sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); in sdhci_set_block_info()
1077 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1083 struct mmc_data *data = cmd->data; in sdhci_prepare_data()
1087 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_prepare_data()
1092 host->flags |= SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1103 if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_data()
1104 if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) { in sdhci_prepare_data()
1114 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) in sdhci_prepare_data()
1116 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) in sdhci_prepare_data()
1121 for_each_sg(data->sg, sg, data->sg_len, i) { in sdhci_prepare_data()
1122 if (sg->length & length_mask) { in sdhci_prepare_data()
1124 sg->length); in sdhci_prepare_data()
1125 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1128 if (sg->offset & offset_mask) { in sdhci_prepare_data()
1130 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1137 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_prepare_data()
1146 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_data()
1147 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_data()
1149 sdhci_set_adma_addr(host, host->adma_addr); in sdhci_prepare_data()
1158 if (!(host->flags & SDHCI_REQ_USE_DMA)) { in sdhci_prepare_data()
1162 if (host->data->flags & MMC_DATA_READ) in sdhci_prepare_data()
1166 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in sdhci_prepare_data()
1167 host->blocks = data->blocks; in sdhci_prepare_data()
1180 struct mmc_host *mmc = host->mmc; in sdhci_external_dma_init()
1182 host->tx_chan = dma_request_chan(mmc->parent, "tx"); in sdhci_external_dma_init()
1183 if (IS_ERR(host->tx_chan)) { in sdhci_external_dma_init()
1184 ret = PTR_ERR(host->tx_chan); in sdhci_external_dma_init()
1185 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1187 host->tx_chan = NULL; in sdhci_external_dma_init()
1191 host->rx_chan = dma_request_chan(mmc->parent, "rx"); in sdhci_external_dma_init()
1192 if (IS_ERR(host->rx_chan)) { in sdhci_external_dma_init()
1193 if (host->tx_chan) { in sdhci_external_dma_init()
1194 dma_release_channel(host->tx_chan); in sdhci_external_dma_init()
1195 host->tx_chan = NULL; in sdhci_external_dma_init()
1198 ret = PTR_ERR(host->rx_chan); in sdhci_external_dma_init()
1199 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1201 host->rx_chan = NULL; in sdhci_external_dma_init()
1210 return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; in sdhci_external_dma_channel()
1219 struct mmc_data *data = cmd->data; in sdhci_external_dma_setup()
1225 if (!host->mapbase) in sdhci_external_dma_setup()
1226 return -EINVAL; in sdhci_external_dma_setup()
1229 cfg.src_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1230 cfg.dst_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1233 cfg.src_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1234 cfg.dst_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1237 for (i = 0; i < data->sg_len; i++) { in sdhci_external_dma_setup()
1238 if ((data->sg + i)->length % data->blksz) in sdhci_external_dma_setup()
1239 return -EINVAL; in sdhci_external_dma_setup()
1250 return -EINVAL; in sdhci_external_dma_setup()
1252 dir = data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; in sdhci_external_dma_setup()
1253 desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, dir, in sdhci_external_dma_setup()
1256 return -EINVAL; in sdhci_external_dma_setup()
1258 desc->callback = NULL; in sdhci_external_dma_setup()
1259 desc->callback_param = NULL; in sdhci_external_dma_setup()
1270 if (host->tx_chan) { in sdhci_external_dma_release()
1271 dma_release_channel(host->tx_chan); in sdhci_external_dma_release()
1272 host->tx_chan = NULL; in sdhci_external_dma_release()
1275 if (host->rx_chan) { in sdhci_external_dma_release()
1276 dma_release_channel(host->rx_chan); in sdhci_external_dma_release()
1277 host->rx_chan = NULL; in sdhci_external_dma_release()
1286 struct mmc_data *data = cmd->data; in __sdhci_external_dma_prepare_data()
1290 host->flags |= SDHCI_REQ_USE_DMA; in __sdhci_external_dma_prepare_data()
1304 mmc_hostname(host->mmc)); in sdhci_external_dma_prepare_data()
1314 if (!cmd->data) in sdhci_external_dma_pre_transfer()
1317 chan = sdhci_external_dma_channel(host, cmd->data); in sdhci_external_dma_pre_transfer()
1326 return -EOPNOTSUPP; in sdhci_external_dma_init()
1355 host->use_external_dma = en; in sdhci_switch_external_dma()
1362 return !mrq->sbc && (host->flags & SDHCI_AUTO_CMD12) && in sdhci_auto_cmd12()
1363 !mrq->cap_cmd_during_tfr; in sdhci_auto_cmd12()
1369 return mrq->sbc && (host->flags & SDHCI_AUTO_CMD23); in sdhci_auto_cmd23()
1375 return mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23); in sdhci_manual_cmd23()
1382 bool use_cmd12 = sdhci_auto_cmd12(host, cmd->mrq) && in sdhci_auto_cmd_select()
1383 (cmd->opcode != SD_IO_RW_EXTENDED); in sdhci_auto_cmd_select()
1384 bool use_cmd23 = sdhci_auto_cmd23(host, cmd->mrq); in sdhci_auto_cmd_select()
1388 * In case of Version 4.10 or later, use of 'Auto CMD Auto in sdhci_auto_cmd_select()
1389 * Select' is recommended rather than use of 'Auto CMD12 in sdhci_auto_cmd_select()
1390 * Enable' or 'Auto CMD23 Enable'. We require Version 4 Mode in sdhci_auto_cmd_select()
1391 * here because some controllers (e.g sdhci-of-dwmshc) expect it. in sdhci_auto_cmd_select()
1393 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_auto_cmd_select()
1408 * If we are sending CMD23, CMD12 never gets sent in sdhci_auto_cmd_select()
1409 * on successful completion (so no Auto-CMD12). in sdhci_auto_cmd_select()
1421 struct mmc_data *data = cmd->data; in sdhci_set_transfer_mode()
1424 if (host->quirks2 & in sdhci_set_transfer_mode()
1427 if (cmd->opcode != MMC_SEND_TUNING_BLOCK_HS200) in sdhci_set_transfer_mode()
1430 /* clear Auto CMD settings for no data CMDs */ in sdhci_set_transfer_mode()
1438 WARN_ON(!host->data); in sdhci_set_transfer_mode()
1440 if (!(host->quirks2 & SDHCI_QUIRK2_SUPPORT_SINGLE)) in sdhci_set_transfer_mode()
1443 if (mmc_op_multi(cmd->opcode) || data->blocks > 1) { in sdhci_set_transfer_mode()
1446 if (sdhci_auto_cmd23(host, cmd->mrq)) in sdhci_set_transfer_mode()
1447 sdhci_writel(host, cmd->mrq->sbc->arg, SDHCI_ARGUMENT2); in sdhci_set_transfer_mode()
1450 if (data->flags & MMC_DATA_READ) in sdhci_set_transfer_mode()
1452 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_mode()
1460 return (!(host->flags & SDHCI_DEVICE_DEAD) && in sdhci_needs_reset()
1461 ((mrq->cmd && mrq->cmd->error) || in sdhci_needs_reset()
1462 (mrq->sbc && mrq->sbc->error) || in sdhci_needs_reset()
1463 (mrq->data && mrq->data->stop && mrq->data->stop->error) || in sdhci_needs_reset()
1464 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))); in sdhci_needs_reset()
1472 if (host->mrqs_done[i] == mrq) { in sdhci_set_mrq_done()
1479 if (!host->mrqs_done[i]) { in sdhci_set_mrq_done()
1480 host->mrqs_done[i] = mrq; in sdhci_set_mrq_done()
1490 if (host->cmd && host->cmd->mrq == mrq) in __sdhci_finish_mrq()
1491 host->cmd = NULL; in __sdhci_finish_mrq()
1493 if (host->data_cmd && host->data_cmd->mrq == mrq) in __sdhci_finish_mrq()
1494 host->data_cmd = NULL; in __sdhci_finish_mrq()
1496 if (host->deferred_cmd && host->deferred_cmd->mrq == mrq) in __sdhci_finish_mrq()
1497 host->deferred_cmd = NULL; in __sdhci_finish_mrq()
1499 if (host->data && host->data->mrq == mrq) in __sdhci_finish_mrq()
1500 host->data = NULL; in __sdhci_finish_mrq()
1503 host->pending_reset = true; in __sdhci_finish_mrq()
1517 queue_work(host->complete_wq, &host->complete_work); in sdhci_finish_mrq()
1522 struct mmc_command *data_cmd = host->data_cmd; in __sdhci_finish_data()
1523 struct mmc_data *data = host->data; in __sdhci_finish_data()
1525 host->data = NULL; in __sdhci_finish_data()
1526 host->data_cmd = NULL; in __sdhci_finish_data()
1532 if (data->error) { in __sdhci_finish_data()
1533 if (!host->cmd || host->cmd == data_cmd) in __sdhci_finish_data()
1538 if ((host->flags & (SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA)) == in __sdhci_finish_data()
1549 if (data->error) in __sdhci_finish_data()
1550 data->bytes_xfered = 0; in __sdhci_finish_data()
1552 data->bytes_xfered = data->blksz * data->blocks; in __sdhci_finish_data()
1555 * Need to send CMD12 if - in __sdhci_finish_data()
1556 * a) open-ended multiblock transfer not using auto CMD12 (no CMD23) in __sdhci_finish_data()
1559 if (data->stop && in __sdhci_finish_data()
1560 ((!data->mrq->sbc && !sdhci_auto_cmd12(host, data->mrq)) || in __sdhci_finish_data()
1561 data->error)) { in __sdhci_finish_data()
1567 if (data->mrq->cap_cmd_during_tfr) { in __sdhci_finish_data()
1568 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1571 host->cmd = NULL; in __sdhci_finish_data()
1572 if (!sdhci_send_command(host, data->stop)) { in __sdhci_finish_data()
1578 data->stop->error = -EIO; in __sdhci_finish_data()
1579 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1581 WARN_ON(host->deferred_cmd); in __sdhci_finish_data()
1582 host->deferred_cmd = data->stop; in __sdhci_finish_data()
1587 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1602 WARN_ON(host->cmd); in sdhci_send_command()
1605 cmd->error = 0; in sdhci_send_command()
1607 if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) && in sdhci_send_command()
1608 cmd->opcode == MMC_STOP_TRANSMISSION) in sdhci_send_command()
1609 cmd->flags |= MMC_RSP_BUSY; in sdhci_send_command()
1617 if (cmd->mrq->data && (cmd == cmd->mrq->data->stop)) in sdhci_send_command()
1623 host->cmd = cmd; in sdhci_send_command()
1624 host->data_timeout = 0; in sdhci_send_command()
1626 WARN_ON(host->data_cmd); in sdhci_send_command()
1627 host->data_cmd = cmd; in sdhci_send_command()
1631 if (cmd->data) { in sdhci_send_command()
1632 if (host->use_external_dma) in sdhci_send_command()
1638 sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); in sdhci_send_command()
1642 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { in sdhci_send_command()
1645 * This does not happen in practice because 136-bit response in sdhci_send_command()
1649 cmd->flags &= ~MMC_RSP_BUSY; in sdhci_send_command()
1652 if (!(cmd->flags & MMC_RSP_PRESENT)) in sdhci_send_command()
1654 else if (cmd->flags & MMC_RSP_136) in sdhci_send_command()
1656 else if (cmd->flags & MMC_RSP_BUSY) in sdhci_send_command()
1661 if (cmd->flags & MMC_RSP_CRC) in sdhci_send_command()
1663 if (cmd->flags & MMC_RSP_OPCODE) in sdhci_send_command()
1667 if (cmd->data || cmd->opcode == MMC_SEND_TUNING_BLOCK || in sdhci_send_command()
1668 cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) in sdhci_send_command()
1672 if (host->data_timeout) in sdhci_send_command()
1673 timeout += nsecs_to_jiffies(host->data_timeout); in sdhci_send_command()
1674 else if (!cmd->data && cmd->busy_timeout > 9000) in sdhci_send_command()
1675 timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; in sdhci_send_command()
1678 sdhci_mod_timer(host, cmd->mrq, timeout); in sdhci_send_command()
1680 if (host->use_external_dma) in sdhci_send_command()
1683 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); in sdhci_send_command()
1691 if (!present || host->flags & SDHCI_DEVICE_DEAD) { in sdhci_present_error()
1692 cmd->error = -ENOMEDIUM; in sdhci_present_error()
1702 __releases(host->lock) in sdhci_send_command_retry()
1703 __acquires(host->lock) in sdhci_send_command_retry()
1705 struct mmc_command *deferred_cmd = host->deferred_cmd; in sdhci_send_command_retry()
1710 if (!timeout--) { in sdhci_send_command_retry()
1712 mmc_hostname(host->mmc)); in sdhci_send_command_retry()
1714 cmd->error = -EIO; in sdhci_send_command_retry()
1718 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_command_retry()
1722 present = host->mmc->ops->get_cd(host->mmc); in sdhci_send_command_retry()
1724 spin_lock_irqsave(&host->lock, flags); in sdhci_send_command_retry()
1727 if (cmd == deferred_cmd && cmd != host->deferred_cmd) in sdhci_send_command_retry()
1734 if (cmd == host->deferred_cmd) in sdhci_send_command_retry()
1735 host->deferred_cmd = NULL; in sdhci_send_command_retry()
1745 reg = SDHCI_RESPONSE + (3 - i) * 4; in sdhci_read_rsp_136()
1746 cmd->resp[i] = sdhci_readl(host, reg); in sdhci_read_rsp_136()
1749 if (host->quirks2 & SDHCI_QUIRK2_RSP_136_HAS_CRC) in sdhci_read_rsp_136()
1754 cmd->resp[i] <<= 8; in sdhci_read_rsp_136()
1756 cmd->resp[i] |= cmd->resp[i + 1] >> 24; in sdhci_read_rsp_136()
1762 struct mmc_command *cmd = host->cmd; in sdhci_finish_command()
1764 host->cmd = NULL; in sdhci_finish_command()
1766 if (cmd->flags & MMC_RSP_PRESENT) { in sdhci_finish_command()
1767 if (cmd->flags & MMC_RSP_136) { in sdhci_finish_command()
1770 cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); in sdhci_finish_command()
1774 if (cmd->mrq->cap_cmd_during_tfr && cmd == cmd->mrq->cmd) in sdhci_finish_command()
1775 mmc_command_done(host->mmc, cmd->mrq); in sdhci_finish_command()
1787 if (cmd->flags & MMC_RSP_BUSY) { in sdhci_finish_command()
1788 if (cmd->data) { in sdhci_finish_command()
1790 } else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) && in sdhci_finish_command()
1791 cmd == host->data_cmd) { in sdhci_finish_command()
1798 if (cmd == cmd->mrq->sbc) { in sdhci_finish_command()
1799 if (!sdhci_send_command(host, cmd->mrq->cmd)) { in sdhci_finish_command()
1800 WARN_ON(host->deferred_cmd); in sdhci_finish_command()
1801 host->deferred_cmd = cmd->mrq->cmd; in sdhci_finish_command()
1806 if (host->data && host->data_early) in sdhci_finish_command()
1809 if (!cmd->data) in sdhci_finish_command()
1810 __sdhci_finish_mrq(host, cmd->mrq); in sdhci_finish_command()
1818 switch (host->timing) { in sdhci_get_preset_value()
1844 pr_warn("%s: Invalid UHS-I mode selected\n", in sdhci_get_preset_value()
1845 mmc_hostname(host->mmc)); in sdhci_get_preset_value()
1860 if (host->version >= SDHCI_SPEC_300) { in sdhci_calc_clk()
1861 if (host->preset_enabled) { in sdhci_calc_clk()
1867 if (host->clk_mul && in sdhci_calc_clk()
1871 clk_mul = host->clk_mul; in sdhci_calc_clk()
1882 if (host->clk_mul) { in sdhci_calc_clk()
1884 if ((host->max_clk * host->clk_mul / div) in sdhci_calc_clk()
1888 if ((host->max_clk * host->clk_mul / div) <= clock) { in sdhci_calc_clk()
1895 clk_mul = host->clk_mul; in sdhci_calc_clk()
1896 div--; in sdhci_calc_clk()
1906 if (!host->clk_mul || switch_base_clk) { in sdhci_calc_clk()
1908 if (host->max_clk <= clock) in sdhci_calc_clk()
1913 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1919 if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) in sdhci_calc_clk()
1920 && !div && host->max_clk <= 25000000) in sdhci_calc_clk()
1926 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1935 *actual_clock = (host->max_clk * clk_mul) / real_div; in sdhci_calc_clk()
1961 mmc_hostname(host->mmc)); in sdhci_enable_clk()
1968 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) { in sdhci_enable_clk()
1983 mmc_hostname(host->mmc)); in sdhci_enable_clk()
2000 host->mmc->actual_clock = 0; in sdhci_set_clock()
2007 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_set_clock()
2015 struct mmc_host *mmc = host->mmc; in sdhci_set_power_reg()
2017 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_reg()
2058 mmc_hostname(host->mmc), vdd); in sdhci_set_power_noreg()
2063 if (host->pwr == pwr) in sdhci_set_power_noreg()
2066 host->pwr = pwr; in sdhci_set_power_noreg()
2070 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2077 if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) in sdhci_set_power_noreg()
2085 if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) in sdhci_set_power_noreg()
2092 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2099 if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) in sdhci_set_power_noreg()
2108 if (IS_ERR(host->mmc->supply.vmmc)) in sdhci_set_power()
2125 if (!IS_ERR(host->mmc->supply.vmmc)) { in sdhci_set_power_and_bus_voltage()
2126 struct mmc_host *mmc = host->mmc; in sdhci_set_power_and_bus_voltage()
2128 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_and_bus_voltage()
2148 present = mmc->ops->get_cd(mmc); in sdhci_request()
2150 spin_lock_irqsave(&host->lock, flags); in sdhci_request()
2154 if (sdhci_present_error(host, mrq->cmd, present)) in sdhci_request()
2157 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request()
2162 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2168 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2179 spin_lock_irqsave(&host->lock, flags); in sdhci_request_atomic()
2181 if (sdhci_present_error(host, mrq->cmd, true)) { in sdhci_request_atomic()
2186 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request_atomic()
2192 * again in non-atomic context. So we should not finish this request in sdhci_request_atomic()
2196 ret = -EBUSY; in sdhci_request_atomic()
2201 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_atomic()
2215 if (host->mmc->caps & MMC_CAP_8_BIT_DATA) in sdhci_set_bus_width()
2246 ctrl_2 |= SDHCI_CTRL_HS400; /* Non-standard */ in sdhci_set_uhs_signaling()
2256 if (ios->power_mode == MMC_POWER_UNDEFINED) in sdhci_set_ios()
2259 if (host->flags & SDHCI_DEVICE_DEAD) { in sdhci_set_ios()
2260 if (!IS_ERR(mmc->supply.vmmc) && in sdhci_set_ios()
2261 ios->power_mode == MMC_POWER_OFF) in sdhci_set_ios()
2262 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in sdhci_set_ios()
2270 if (ios->power_mode == MMC_POWER_OFF) { in sdhci_set_ios()
2275 if (host->version >= SDHCI_SPEC_300 && in sdhci_set_ios()
2276 (ios->power_mode == MMC_POWER_UP) && in sdhci_set_ios()
2277 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) in sdhci_set_ios()
2280 if (!ios->clock || ios->clock != host->clock) { in sdhci_set_ios()
2281 host->ops->set_clock(host, ios->clock); in sdhci_set_ios()
2282 host->clock = ios->clock; in sdhci_set_ios()
2284 if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK && in sdhci_set_ios()
2285 host->clock) { in sdhci_set_ios()
2286 host->timeout_clk = host->mmc->actual_clock ? in sdhci_set_ios()
2287 host->mmc->actual_clock / 1000 : in sdhci_set_ios()
2288 host->clock / 1000; in sdhci_set_ios()
2289 host->mmc->max_busy_timeout = in sdhci_set_ios()
2290 host->ops->get_max_timeout_count ? in sdhci_set_ios()
2291 host->ops->get_max_timeout_count(host) : in sdhci_set_ios()
2293 host->mmc->max_busy_timeout /= host->timeout_clk; in sdhci_set_ios()
2297 if (host->ops->set_power) in sdhci_set_ios()
2298 host->ops->set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2300 sdhci_set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2302 if (host->ops->platform_send_init_74_clocks) in sdhci_set_ios()
2303 host->ops->platform_send_init_74_clocks(host, ios->power_mode); in sdhci_set_ios()
2305 host->ops->set_bus_width(host, ios->bus_width); in sdhci_set_ios()
2309 if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) { in sdhci_set_ios()
2310 if (ios->timing == MMC_TIMING_SD_HS || in sdhci_set_ios()
2311 ios->timing == MMC_TIMING_MMC_HS || in sdhci_set_ios()
2312 ios->timing == MMC_TIMING_MMC_HS400 || in sdhci_set_ios()
2313 ios->timing == MMC_TIMING_MMC_HS200 || in sdhci_set_ios()
2314 ios->timing == MMC_TIMING_MMC_DDR52 || in sdhci_set_ios()
2315 ios->timing == MMC_TIMING_UHS_SDR50 || in sdhci_set_ios()
2316 ios->timing == MMC_TIMING_UHS_SDR104 || in sdhci_set_ios()
2317 ios->timing == MMC_TIMING_UHS_DDR50 || in sdhci_set_ios()
2318 ios->timing == MMC_TIMING_UHS_SDR25) in sdhci_set_ios()
2324 if (host->version >= SDHCI_SPEC_300) { in sdhci_set_ios()
2327 if (!host->preset_enabled) { in sdhci_set_ios()
2335 if (ios->drv_type == MMC_SET_DRIVER_TYPE_A) in sdhci_set_ios()
2337 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_B) in sdhci_set_ios()
2339 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C) in sdhci_set_ios()
2341 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_D) in sdhci_set_ios()
2365 /* Re-enable SD Clock */ in sdhci_set_ios()
2366 host->ops->set_clock(host, host->clock); in sdhci_set_ios()
2374 host->ops->set_uhs_signaling(host, ios->timing); in sdhci_set_ios()
2375 host->timing = ios->timing; in sdhci_set_ios()
2377 if (!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) && in sdhci_set_ios()
2378 ((ios->timing == MMC_TIMING_UHS_SDR12) || in sdhci_set_ios()
2379 (ios->timing == MMC_TIMING_UHS_SDR25) || in sdhci_set_ios()
2380 (ios->timing == MMC_TIMING_UHS_SDR50) || in sdhci_set_ios()
2381 (ios->timing == MMC_TIMING_UHS_SDR104) || in sdhci_set_ios()
2382 (ios->timing == MMC_TIMING_UHS_DDR50) || in sdhci_set_ios()
2383 (ios->timing == MMC_TIMING_MMC_DDR52))) { in sdhci_set_ios()
2388 ios->drv_type = FIELD_GET(SDHCI_PRESET_DRV_MASK, in sdhci_set_ios()
2392 /* Re-enable SD Clock */ in sdhci_set_ios()
2393 host->ops->set_clock(host, host->clock); in sdhci_set_ios()
2402 if (host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) in sdhci_set_ios()
2413 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_get_cd()
2417 if (!mmc_card_is_removable(host->mmc)) in sdhci_get_cd()
2432 if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) in sdhci_get_cd()
2444 spin_lock_irqsave(&host->lock, flags); in sdhci_check_ro()
2446 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_check_ro()
2448 else if (host->ops->get_ro) in sdhci_check_ro()
2449 is_readonly = host->ops->get_ro(host); in sdhci_check_ro()
2450 else if (mmc_can_gpio_ro(host->mmc)) in sdhci_check_ro()
2451 is_readonly = mmc_gpio_get_ro(host->mmc); in sdhci_check_ro()
2456 spin_unlock_irqrestore(&host->lock, flags); in sdhci_check_ro()
2458 /* This quirk needs to be replaced by a callback-function later */ in sdhci_check_ro()
2459 return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? in sdhci_check_ro()
2470 if (!(host->quirks & SDHCI_QUIRK_UNSTABLE_RO_DETECT)) in sdhci_get_ro()
2488 if (host->ops && host->ops->hw_reset) in sdhci_hw_reset()
2489 host->ops->hw_reset(host); in sdhci_hw_reset()
2494 if (!(host->flags & SDHCI_DEVICE_DEAD)) { in sdhci_enable_sdio_irq_nolock()
2496 host->ier |= SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2498 host->ier &= ~SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2500 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_enable_sdio_irq_nolock()
2501 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_enable_sdio_irq_nolock()
2511 pm_runtime_get_noresume(host->mmc->parent); in sdhci_enable_sdio_irq()
2513 spin_lock_irqsave(&host->lock, flags); in sdhci_enable_sdio_irq()
2515 spin_unlock_irqrestore(&host->lock, flags); in sdhci_enable_sdio_irq()
2518 pm_runtime_put_noidle(host->mmc->parent); in sdhci_enable_sdio_irq()
2527 spin_lock_irqsave(&host->lock, flags); in sdhci_ack_sdio_irq()
2529 spin_unlock_irqrestore(&host->lock, flags); in sdhci_ack_sdio_irq()
2543 if (host->version < SDHCI_SPEC_300) in sdhci_start_signal_voltage_switch()
2548 switch (ios->signal_voltage) { in sdhci_start_signal_voltage_switch()
2550 if (!(host->flags & SDHCI_SIGNALING_330)) in sdhci_start_signal_voltage_switch()
2551 return -EINVAL; in sdhci_start_signal_voltage_switch()
2556 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2561 return -EIO; in sdhci_start_signal_voltage_switch()
2575 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2577 if (!(host->flags & SDHCI_SIGNALING_180)) in sdhci_start_signal_voltage_switch()
2578 return -EINVAL; in sdhci_start_signal_voltage_switch()
2579 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2584 return -EIO; in sdhci_start_signal_voltage_switch()
2596 if (host->ops->voltage_switch) in sdhci_start_signal_voltage_switch()
2597 host->ops->voltage_switch(host); in sdhci_start_signal_voltage_switch()
2607 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2609 if (!(host->flags & SDHCI_SIGNALING_120)) in sdhci_start_signal_voltage_switch()
2610 return -EINVAL; in sdhci_start_signal_voltage_switch()
2611 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2616 return -EIO; in sdhci_start_signal_voltage_switch()
2643 spin_lock_irqsave(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2644 host->flags |= SDHCI_HS400_TUNING; in sdhci_prepare_hs400_tuning()
2645 spin_unlock_irqrestore(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2656 if (host->quirks2 & SDHCI_QUIRK2_TUNING_WORK_AROUND) in sdhci_start_tuning()
2677 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_end_tuning()
2678 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_end_tuning()
2702 mmc_abort_tuning(host->mmc, opcode); in sdhci_abort_tuning()
2709 * automatically) so mmc_send_tuning() will return -EIO. Also the tuning command
2715 struct mmc_host *mmc = host->mmc; in sdhci_send_tuning()
2719 u32 b = host->sdma_boundary; in sdhci_send_tuning()
2721 spin_lock_irqsave(&host->lock, flags); in sdhci_send_tuning()
2734 mmc->ios.bus_width == MMC_BUS_WIDTH_8) in sdhci_send_tuning()
2748 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2749 host->tuning_done = 0; in sdhci_send_tuning()
2753 host->cmd = NULL; in sdhci_send_tuning()
2757 host->tuning_done = 0; in sdhci_send_tuning()
2759 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2762 wait_event_timeout(host->buf_ready_int, (host->tuning_done == 1), in sdhci_send_tuning()
2776 for (i = 0; i < host->tuning_loop_count; i++) { in __sdhci_execute_tuning()
2781 if (!host->tuning_done) { in __sdhci_execute_tuning()
2783 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2785 return -ETIMEDOUT; in __sdhci_execute_tuning()
2789 if (host->tuning_delay > 0) in __sdhci_execute_tuning()
2790 mdelay(host->tuning_delay); in __sdhci_execute_tuning()
2802 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2804 return -EAGAIN; in __sdhci_execute_tuning()
2814 hs400_tuning = host->flags & SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2816 if (host->tuning_mode == SDHCI_TUNING_MODE_1) in sdhci_execute_tuning()
2817 tuning_count = host->tuning_count; in sdhci_execute_tuning()
2826 switch (host->timing) { in sdhci_execute_tuning()
2829 err = -EINVAL; in sdhci_execute_tuning()
2834 * Periodic re-tuning for HS400 is not expected to be needed, so in sdhci_execute_tuning()
2846 if (host->flags & SDHCI_SDR50_NEEDS_TUNING) in sdhci_execute_tuning()
2854 if (host->ops->platform_execute_tuning) { in sdhci_execute_tuning()
2855 err = host->ops->platform_execute_tuning(host, opcode); in sdhci_execute_tuning()
2859 host->mmc->retune_period = tuning_count; in sdhci_execute_tuning()
2861 if (host->tuning_delay < 0) in sdhci_execute_tuning()
2862 host->tuning_delay = opcode == MMC_SEND_TUNING_BLOCK; in sdhci_execute_tuning()
2866 host->tuning_err = __sdhci_execute_tuning(host, opcode); in sdhci_execute_tuning()
2870 host->flags &= ~SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2879 if (host->version < SDHCI_SPEC_300) in sdhci_enable_preset_value()
2886 if (host->preset_enabled != enable) { in sdhci_enable_preset_value()
2897 host->flags |= SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
2899 host->flags &= ~SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
2901 host->preset_enabled = enable; in sdhci_enable_preset_value()
2909 struct mmc_data *data = mrq->data; in sdhci_post_req()
2911 if (data->host_cookie != COOKIE_UNMAPPED) in sdhci_post_req()
2912 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, in sdhci_post_req()
2915 data->host_cookie = COOKIE_UNMAPPED; in sdhci_post_req()
2922 mrq->data->host_cookie = COOKIE_UNMAPPED; in sdhci_pre_req()
2925 * No pre-mapping in the pre hook if we're using the bounce buffer, in sdhci_pre_req()
2929 if (host->flags & SDHCI_REQ_USE_DMA && !host->bounce_buffer) in sdhci_pre_req()
2930 sdhci_pre_dma_transfer(host, mrq->data, COOKIE_PRE_MAPPED); in sdhci_pre_req()
2935 if (host->data_cmd) { in sdhci_error_out_mrqs()
2936 host->data_cmd->error = err; in sdhci_error_out_mrqs()
2937 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_error_out_mrqs()
2940 if (host->cmd) { in sdhci_error_out_mrqs()
2941 host->cmd->error = err; in sdhci_error_out_mrqs()
2942 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_error_out_mrqs()
2953 if (host->ops->card_event) in sdhci_card_event()
2954 host->ops->card_event(host); in sdhci_card_event()
2956 present = mmc->ops->get_cd(mmc); in sdhci_card_event()
2958 spin_lock_irqsave(&host->lock, flags); in sdhci_card_event()
2963 mmc_hostname(host->mmc)); in sdhci_card_event()
2965 mmc_hostname(host->mmc)); in sdhci_card_event()
2970 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_card_event()
2973 spin_unlock_irqrestore(&host->lock, flags); in sdhci_card_event()
3005 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
3008 mrq = host->mrqs_done[i]; in sdhci_request_done()
3014 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3026 * also be in mrqs_done, otherwise host->cmd and host->data_cmd in sdhci_request_done()
3029 if (host->cmd || host->data_cmd) { in sdhci_request_done()
3030 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3035 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) in sdhci_request_done()
3037 host->ops->set_clock(host, host->clock); in sdhci_request_done()
3046 host->pending_reset = false; in sdhci_request_done()
3054 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_request_done()
3055 struct mmc_data *data = mrq->data; in sdhci_request_done()
3057 if (host->use_external_dma && data && in sdhci_request_done()
3058 (mrq->cmd->error || data->error)) { in sdhci_request_done()
3061 host->mrqs_done[i] = NULL; in sdhci_request_done()
3062 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3064 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
3068 if (data && data->host_cookie == COOKIE_MAPPED) { in sdhci_request_done()
3069 if (host->bounce_buffer) { in sdhci_request_done()
3075 unsigned int length = data->bytes_xfered; in sdhci_request_done()
3077 if (length > host->bounce_buffer_size) { in sdhci_request_done()
3079 mmc_hostname(host->mmc), in sdhci_request_done()
3080 host->bounce_buffer_size, in sdhci_request_done()
3081 data->bytes_xfered); in sdhci_request_done()
3083 length = host->bounce_buffer_size; in sdhci_request_done()
3086 host->mmc->parent, in sdhci_request_done()
3087 host->bounce_addr, in sdhci_request_done()
3088 host->bounce_buffer_size, in sdhci_request_done()
3090 sg_copy_from_buffer(data->sg, in sdhci_request_done()
3091 data->sg_len, in sdhci_request_done()
3092 host->bounce_buffer, in sdhci_request_done()
3097 host->mmc->parent, in sdhci_request_done()
3098 host->bounce_addr, in sdhci_request_done()
3099 host->bounce_buffer_size, in sdhci_request_done()
3104 dma_unmap_sg(mmc_dev(host->mmc), data->sg, in sdhci_request_done()
3105 data->sg_len, in sdhci_request_done()
3108 data->host_cookie = COOKIE_UNMAPPED; in sdhci_request_done()
3112 host->mrqs_done[i] = NULL; in sdhci_request_done()
3114 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3116 if (host->ops->request_done) in sdhci_request_done()
3117 host->ops->request_done(host, mrq); in sdhci_request_done()
3119 mmc_request_done(host->mmc, mrq); in sdhci_request_done()
3140 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_timer()
3142 if (host->cmd && !sdhci_data_line_cmd(host->cmd)) { in sdhci_timeout_timer()
3144 mmc_hostname(host->mmc)); in sdhci_timeout_timer()
3147 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_timer()
3148 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_timer()
3151 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_timer()
3161 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_data_timer()
3163 if (host->data || host->data_cmd || in sdhci_timeout_data_timer()
3164 (host->cmd && sdhci_data_line_cmd(host->cmd))) { in sdhci_timeout_data_timer()
3166 mmc_hostname(host->mmc)); in sdhci_timeout_data_timer()
3169 if (host->data) { in sdhci_timeout_data_timer()
3170 host->data->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3172 queue_work(host->complete_wq, &host->complete_work); in sdhci_timeout_data_timer()
3173 } else if (host->data_cmd) { in sdhci_timeout_data_timer()
3174 host->data_cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3175 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_timeout_data_timer()
3177 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3178 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_data_timer()
3182 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_data_timer()
3193 /* Handle auto-CMD12 error */ in sdhci_cmd_irq()
3194 if (intmask & SDHCI_INT_AUTO_CMD_ERR && host->data_cmd) { in sdhci_cmd_irq()
3195 struct mmc_request *mrq = host->data_cmd->mrq; in sdhci_cmd_irq()
3201 /* Treat auto-CMD12 error the same as data error */ in sdhci_cmd_irq()
3202 if (!mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) { in sdhci_cmd_irq()
3208 if (!host->cmd) { in sdhci_cmd_irq()
3214 if (host->pending_reset) in sdhci_cmd_irq()
3217 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_cmd_irq()
3225 host->cmd->error = -ETIMEDOUT; in sdhci_cmd_irq()
3227 host->cmd->error = -EILSEQ; in sdhci_cmd_irq()
3230 if (host->cmd->data && in sdhci_cmd_irq()
3233 host->cmd = NULL; in sdhci_cmd_irq()
3238 __sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_cmd_irq()
3242 /* Handle auto-CMD23 error */ in sdhci_cmd_irq()
3244 struct mmc_request *mrq = host->cmd->mrq; in sdhci_cmd_irq()
3247 -ETIMEDOUT : in sdhci_cmd_irq()
3248 -EILSEQ; in sdhci_cmd_irq()
3250 if (mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) { in sdhci_cmd_irq()
3251 mrq->sbc->error = err; in sdhci_cmd_irq()
3263 void *desc = host->adma_table; in sdhci_adma_show_error()
3264 dma_addr_t dma = host->adma_addr; in sdhci_adma_show_error()
3271 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_show_error()
3274 le32_to_cpu(dma_desc->addr_hi), in sdhci_adma_show_error()
3275 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3276 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3277 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3281 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3282 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3283 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3285 desc += host->desc_sz; in sdhci_adma_show_error()
3286 dma += host->desc_sz; in sdhci_adma_show_error()
3288 if (dma_desc->cmd & cpu_to_le16(ADMA2_END)) in sdhci_adma_show_error()
3302 host->tuning_done = 1; in sdhci_data_irq()
3303 wake_up(&host->buf_ready_int); in sdhci_data_irq()
3308 if (!host->data) { in sdhci_data_irq()
3309 struct mmc_command *data_cmd = host->data_cmd; in sdhci_data_irq()
3316 if (data_cmd && (data_cmd->flags & MMC_RSP_BUSY)) { in sdhci_data_irq()
3318 host->data_cmd = NULL; in sdhci_data_irq()
3319 data_cmd->error = -ETIMEDOUT; in sdhci_data_irq()
3320 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3324 host->data_cmd = NULL; in sdhci_data_irq()
3326 * Some cards handle busy-end interrupt in sdhci_data_irq()
3330 if (host->cmd == data_cmd) in sdhci_data_irq()
3333 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3343 if (host->pending_reset) in sdhci_data_irq()
3347 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_data_irq()
3354 host->data->error = -ETIMEDOUT; in sdhci_data_irq()
3356 host->data->error = -EILSEQ; in sdhci_data_irq()
3360 host->data->error = -EILSEQ; in sdhci_data_irq()
3362 pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), in sdhci_data_irq()
3365 host->data->error = -EIO; in sdhci_data_irq()
3366 if (host->ops->adma_workaround) in sdhci_data_irq()
3367 host->ops->adma_workaround(host, intmask); in sdhci_data_irq()
3370 if (host->data->error) in sdhci_data_irq()
3389 dmanow = dmastart + host->data->bytes_xfered; in sdhci_data_irq()
3394 ~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + in sdhci_data_irq()
3396 host->data->bytes_xfered = dmanow - dmastart; in sdhci_data_irq()
3398 &dmastart, host->data->bytes_xfered, &dmanow); in sdhci_data_irq()
3403 if (host->cmd == host->data_cmd) { in sdhci_data_irq()
3409 host->data_early = 1; in sdhci_data_irq()
3420 struct mmc_data *data = mrq->data; in sdhci_defer_done()
3422 return host->pending_reset || host->always_defer_done || in sdhci_defer_done()
3423 ((host->flags & SDHCI_REQ_USE_DMA) && data && in sdhci_defer_done()
3424 data->host_cookie == COOKIE_MAPPED); in sdhci_defer_done()
3436 spin_lock(&host->lock); in sdhci_irq()
3438 if (host->runtime_suspended) { in sdhci_irq()
3439 spin_unlock(&host->lock); in sdhci_irq()
3452 if (host->ops->irq) { in sdhci_irq()
3453 intmask = host->ops->irq(host, intmask); in sdhci_irq()
3478 host->ier &= ~(SDHCI_INT_CARD_INSERT | in sdhci_irq()
3480 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_irq()
3482 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_irq()
3483 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_irq()
3488 host->thread_isr |= intmask & (SDHCI_INT_CARD_INSERT | in sdhci_irq()
3501 mmc_hostname(host->mmc)); in sdhci_irq()
3504 mmc_retune_needed(host->mmc); in sdhci_irq()
3507 (host->ier & SDHCI_INT_CARD_INT)) { in sdhci_irq()
3509 sdio_signal_irq(host->mmc); in sdhci_irq()
3526 } while (intmask && --max_loops); in sdhci_irq()
3530 struct mmc_request *mrq = host->mrqs_done[i]; in sdhci_irq()
3539 host->mrqs_done[i] = NULL; in sdhci_irq()
3543 if (host->deferred_cmd) in sdhci_irq()
3546 spin_unlock(&host->lock); in sdhci_irq()
3553 if (host->ops->request_done) in sdhci_irq()
3554 host->ops->request_done(host, mrqs_done[i]); in sdhci_irq()
3556 mmc_request_done(host->mmc, mrqs_done[i]); in sdhci_irq()
3561 mmc_hostname(host->mmc), unexpected); in sdhci_irq()
3578 spin_lock_irqsave(&host->lock, flags); in sdhci_thread_irq()
3580 isr = host->thread_isr; in sdhci_thread_irq()
3581 host->thread_isr = 0; in sdhci_thread_irq()
3583 cmd = host->deferred_cmd; in sdhci_thread_irq()
3585 sdhci_finish_mrq(host, cmd->mrq); in sdhci_thread_irq()
3587 spin_unlock_irqrestore(&host->lock, flags); in sdhci_thread_irq()
3590 struct mmc_host *mmc = host->mmc; in sdhci_thread_irq()
3592 mmc->ops->card_event(mmc); in sdhci_thread_irq()
3609 return mmc_card_is_removable(host->mmc) && in sdhci_cd_irq_can_wakeup()
3610 !(host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_cd_irq_can_wakeup()
3611 !mmc_can_gpio_cd(host->mmc); in sdhci_cd_irq_can_wakeup()
3616 * the Interrupt Status Enable register too. See 'Table 1-6: Wakeup Signal
3635 if (mmc_card_wake_sdio_irq(host->mmc)) { in sdhci_enable_irq_wakeups()
3650 host->irq_wake_enabled = !enable_irq_wake(host->irq); in sdhci_enable_irq_wakeups()
3652 return host->irq_wake_enabled; in sdhci_enable_irq_wakeups()
3665 disable_irq_wake(host->irq); in sdhci_disable_irq_wakeups()
3667 host->irq_wake_enabled = false; in sdhci_disable_irq_wakeups()
3674 mmc_retune_timer_stop(host->mmc); in sdhci_suspend_host()
3676 if (!device_may_wakeup(mmc_dev(host->mmc)) || in sdhci_suspend_host()
3678 host->ier = 0; in sdhci_suspend_host()
3681 free_irq(host->irq, host); in sdhci_suspend_host()
3691 struct mmc_host *mmc = host->mmc; in sdhci_resume_host()
3694 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_resume_host()
3695 if (host->ops->enable_dma) in sdhci_resume_host()
3696 host->ops->enable_dma(host); in sdhci_resume_host()
3699 if ((host->mmc->pm_flags & MMC_PM_KEEP_POWER) && in sdhci_resume_host()
3700 (host->quirks2 & SDHCI_QUIRK2_HOST_OFF_CARD_ON)) { in sdhci_resume_host()
3703 host->pwr = 0; in sdhci_resume_host()
3704 host->clock = 0; in sdhci_resume_host()
3705 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_resume_host()
3707 sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); in sdhci_resume_host()
3710 if (host->irq_wake_enabled) { in sdhci_resume_host()
3713 ret = request_threaded_irq(host->irq, sdhci_irq, in sdhci_resume_host()
3715 mmc_hostname(host->mmc), host); in sdhci_resume_host()
3731 mmc_retune_timer_stop(host->mmc); in sdhci_runtime_suspend_host()
3733 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3734 host->ier &= SDHCI_INT_CARD_INT; in sdhci_runtime_suspend_host()
3735 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_runtime_suspend_host()
3736 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_runtime_suspend_host()
3737 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3739 synchronize_hardirq(host->irq); in sdhci_runtime_suspend_host()
3741 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3742 host->runtime_suspended = true; in sdhci_runtime_suspend_host()
3743 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3751 struct mmc_host *mmc = host->mmc; in sdhci_runtime_resume_host()
3753 int host_flags = host->flags; in sdhci_runtime_resume_host()
3756 if (host->ops->enable_dma) in sdhci_runtime_resume_host()
3757 host->ops->enable_dma(host); in sdhci_runtime_resume_host()
3762 if (mmc->ios.power_mode != MMC_POWER_UNDEFINED && in sdhci_runtime_resume_host()
3763 mmc->ios.power_mode != MMC_POWER_OFF) { in sdhci_runtime_resume_host()
3764 /* Force clock and power re-program */ in sdhci_runtime_resume_host()
3765 host->pwr = 0; in sdhci_runtime_resume_host()
3766 host->clock = 0; in sdhci_runtime_resume_host()
3767 mmc->ops->start_signal_voltage_switch(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3768 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3771 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) { in sdhci_runtime_resume_host()
3772 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3774 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3777 if ((mmc->caps2 & MMC_CAP2_HS400_ES) && in sdhci_runtime_resume_host()
3778 mmc->ops->hs400_enhanced_strobe) in sdhci_runtime_resume_host()
3779 mmc->ops->hs400_enhanced_strobe(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3782 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3784 host->runtime_suspended = false; in sdhci_runtime_resume_host()
3793 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3813 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_enable()
3822 if (host->v4_mode && (host->caps1 & SDHCI_CAN_DO_ADMA3)) in sdhci_cqe_enable()
3824 else if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_cqe_enable()
3830 sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, 512), in sdhci_cqe_enable()
3836 host->ier = host->cqe_ier; in sdhci_cqe_enable()
3838 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_cqe_enable()
3839 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_cqe_enable()
3841 host->cqe_on = true; in sdhci_cqe_enable()
3844 mmc_hostname(mmc), host->ier, in sdhci_cqe_enable()
3847 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_enable()
3856 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_disable()
3860 host->cqe_on = false; in sdhci_cqe_disable()
3868 mmc_hostname(mmc), host->ier, in sdhci_cqe_disable()
3871 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_disable()
3880 if (!host->cqe_on) in sdhci_cqe_irq()
3884 *cmd_error = -EILSEQ; in sdhci_cqe_irq()
3886 *cmd_error = -ETIMEDOUT; in sdhci_cqe_irq()
3891 *data_error = -EILSEQ; in sdhci_cqe_irq()
3893 *data_error = -ETIMEDOUT; in sdhci_cqe_irq()
3895 *data_error = -EIO; in sdhci_cqe_irq()
3900 mask = intmask & host->cqe_ier; in sdhci_cqe_irq()
3905 mmc_hostname(host->mmc)); in sdhci_cqe_irq()
3907 intmask &= ~(host->cqe_ier | SDHCI_INT_ERROR); in sdhci_cqe_irq()
3911 mmc_hostname(host->mmc), intmask); in sdhci_cqe_irq()
3935 return ERR_PTR(-ENOMEM); in sdhci_alloc_host()
3938 host->mmc = mmc; in sdhci_alloc_host()
3939 host->mmc_host_ops = sdhci_ops; in sdhci_alloc_host()
3940 mmc->ops = &host->mmc_host_ops; in sdhci_alloc_host()
3942 host->flags = SDHCI_SIGNALING_330; in sdhci_alloc_host()
3944 host->cqe_ier = SDHCI_CQE_INT_MASK; in sdhci_alloc_host()
3945 host->cqe_err_ier = SDHCI_CQE_INT_ERR_MASK; in sdhci_alloc_host()
3947 host->tuning_delay = -1; in sdhci_alloc_host()
3948 host->tuning_loop_count = MAX_TUNING_LOOP; in sdhci_alloc_host()
3950 host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG; in sdhci_alloc_host()
3957 host->adma_table_cnt = SDHCI_MAX_SEGS * 2 + 1; in sdhci_alloc_host()
3966 struct mmc_host *mmc = host->mmc; in sdhci_set_dma_mask()
3968 int ret = -EINVAL; in sdhci_set_dma_mask()
3970 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) in sdhci_set_dma_mask()
3971 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
3973 /* Try 64-bit mask if hardware is capable of it */ in sdhci_set_dma_mask()
3974 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_set_dma_mask()
3977 pr_warn("%s: Failed to set 64-bit DMA mask.\n", in sdhci_set_dma_mask()
3979 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
3983 /* 32-bit mask as default & fallback */ in sdhci_set_dma_mask()
3987 pr_warn("%s: Failed to set 32-bit DMA mask.\n", in sdhci_set_dma_mask()
4001 if (host->read_caps) in __sdhci_read_caps()
4004 host->read_caps = true; in __sdhci_read_caps()
4007 host->quirks = debug_quirks; in __sdhci_read_caps()
4010 host->quirks2 = debug_quirks2; in __sdhci_read_caps()
4014 if (host->v4_mode) in __sdhci_read_caps()
4017 device_property_read_u64_array(mmc_dev(host->mmc), in __sdhci_read_caps()
4018 "sdhci-caps-mask", &dt_caps_mask, 1); in __sdhci_read_caps()
4019 device_property_read_u64_array(mmc_dev(host->mmc), in __sdhci_read_caps()
4020 "sdhci-caps", &dt_caps, 1); in __sdhci_read_caps()
4023 host->version = (v & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; in __sdhci_read_caps()
4025 if (host->quirks & SDHCI_QUIRK_MISSING_CAPS) in __sdhci_read_caps()
4029 host->caps = *caps; in __sdhci_read_caps()
4031 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); in __sdhci_read_caps()
4032 host->caps &= ~lower_32_bits(dt_caps_mask); in __sdhci_read_caps()
4033 host->caps |= lower_32_bits(dt_caps); in __sdhci_read_caps()
4036 if (host->version < SDHCI_SPEC_300) in __sdhci_read_caps()
4040 host->caps1 = *caps1; in __sdhci_read_caps()
4042 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); in __sdhci_read_caps()
4043 host->caps1 &= ~upper_32_bits(dt_caps_mask); in __sdhci_read_caps()
4044 host->caps1 |= upper_32_bits(dt_caps); in __sdhci_read_caps()
4051 struct mmc_host *mmc = host->mmc; in sdhci_allocate_bounce_buffer()
4067 if (mmc->max_req_size < bounce_size) in sdhci_allocate_bounce_buffer()
4068 bounce_size = mmc->max_req_size; in sdhci_allocate_bounce_buffer()
4076 host->bounce_buffer = devm_kmalloc(mmc->parent, in sdhci_allocate_bounce_buffer()
4079 if (!host->bounce_buffer) { in sdhci_allocate_bounce_buffer()
4085 * mmc->max_segs == 1. in sdhci_allocate_bounce_buffer()
4090 host->bounce_addr = dma_map_single(mmc->parent, in sdhci_allocate_bounce_buffer()
4091 host->bounce_buffer, in sdhci_allocate_bounce_buffer()
4094 ret = dma_mapping_error(mmc->parent, host->bounce_addr); in sdhci_allocate_bounce_buffer()
4098 host->bounce_buffer_size = bounce_size; in sdhci_allocate_bounce_buffer()
4101 mmc->max_segs = max_blocks; in sdhci_allocate_bounce_buffer()
4102 mmc->max_seg_size = bounce_size; in sdhci_allocate_bounce_buffer()
4103 mmc->max_req_size = bounce_size; in sdhci_allocate_bounce_buffer()
4113 * version 4.10 in Capabilities Register is used as 64-bit System in sdhci_can_64bit_dma()
4116 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) in sdhci_can_64bit_dma()
4117 return host->caps & SDHCI_CAN_64BIT_V4; in sdhci_can_64bit_dma()
4119 return host->caps & SDHCI_CAN_64BIT; in sdhci_can_64bit_dma()
4134 return -EINVAL; in sdhci_setup_host()
4136 mmc = host->mmc; in sdhci_setup_host()
4144 if (!mmc->supply.vqmmc) { in sdhci_setup_host()
4160 override_timeout_clk = host->timeout_clk; in sdhci_setup_host()
4162 if (host->version > SDHCI_SPEC_420) { in sdhci_setup_host()
4164 mmc_hostname(mmc), host->version); in sdhci_setup_host()
4167 if (host->quirks & SDHCI_QUIRK_FORCE_DMA) in sdhci_setup_host()
4168 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4169 else if (!(host->caps & SDHCI_CAN_DO_SDMA)) in sdhci_setup_host()
4172 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4174 if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && in sdhci_setup_host()
4175 (host->flags & SDHCI_USE_SDMA)) { in sdhci_setup_host()
4177 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4180 if ((host->version >= SDHCI_SPEC_200) && in sdhci_setup_host()
4181 (host->caps & SDHCI_CAN_DO_ADMA2)) in sdhci_setup_host()
4182 host->flags |= SDHCI_USE_ADMA; in sdhci_setup_host()
4184 if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && in sdhci_setup_host()
4185 (host->flags & SDHCI_USE_ADMA)) { in sdhci_setup_host()
4187 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4191 host->flags |= SDHCI_USE_64_BIT_DMA; in sdhci_setup_host()
4193 if (host->use_external_dma) { in sdhci_setup_host()
4195 if (ret == -EPROBE_DEFER) in sdhci_setup_host()
4205 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4208 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_setup_host()
4209 if (host->ops->set_dma_mask) in sdhci_setup_host()
4210 ret = host->ops->set_dma_mask(host); in sdhci_setup_host()
4214 if (!ret && host->ops->enable_dma) in sdhci_setup_host()
4215 ret = host->ops->enable_dma(host); in sdhci_setup_host()
4218 pr_warn("%s: No suitable DMA available - falling back to PIO\n", in sdhci_setup_host()
4220 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4226 /* SDMA does not support 64-bit DMA if v4 mode not set */ in sdhci_setup_host()
4227 if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode) in sdhci_setup_host()
4228 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4230 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4234 if (!(host->flags & SDHCI_USE_64_BIT_DMA)) in sdhci_setup_host()
4235 host->alloc_desc_sz = SDHCI_ADMA2_32_DESC_SZ; in sdhci_setup_host()
4236 else if (!host->alloc_desc_sz) in sdhci_setup_host()
4237 host->alloc_desc_sz = SDHCI_ADMA2_64_DESC_SZ(host); in sdhci_setup_host()
4239 host->desc_sz = host->alloc_desc_sz; in sdhci_setup_host()
4240 host->adma_table_sz = host->adma_table_cnt * host->desc_sz; in sdhci_setup_host()
4242 host->align_buffer_sz = SDHCI_MAX_SEGS * SDHCI_ADMA2_ALIGN; in sdhci_setup_host()
4244 * Use zalloc to zero the reserved high 32-bits of 128-bit in sdhci_setup_host()
4248 host->align_buffer_sz + host->adma_table_sz, in sdhci_setup_host()
4251 pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n", in sdhci_setup_host()
4253 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4254 } else if ((dma + host->align_buffer_sz) & in sdhci_setup_host()
4255 (SDHCI_ADMA2_DESC_ALIGN - 1)) { in sdhci_setup_host()
4258 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4259 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4260 host->adma_table_sz, buf, dma); in sdhci_setup_host()
4262 host->align_buffer = buf; in sdhci_setup_host()
4263 host->align_addr = dma; in sdhci_setup_host()
4265 host->adma_table = buf + host->align_buffer_sz; in sdhci_setup_host()
4266 host->adma_addr = dma + host->align_buffer_sz; in sdhci_setup_host()
4275 if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { in sdhci_setup_host()
4276 host->dma_mask = DMA_BIT_MASK(64); in sdhci_setup_host()
4277 mmc_dev(mmc)->dma_mask = &host->dma_mask; in sdhci_setup_host()
4280 if (host->version >= SDHCI_SPEC_300) in sdhci_setup_host()
4281 host->max_clk = FIELD_GET(SDHCI_CLOCK_V3_BASE_MASK, host->caps); in sdhci_setup_host()
4283 host->max_clk = FIELD_GET(SDHCI_CLOCK_BASE_MASK, host->caps); in sdhci_setup_host()
4285 host->max_clk *= 1000000; in sdhci_setup_host()
4286 if (host->max_clk == 0 || host->quirks & in sdhci_setup_host()
4288 if (!host->ops->get_max_clock) { in sdhci_setup_host()
4291 ret = -ENODEV; in sdhci_setup_host()
4294 host->max_clk = host->ops->get_max_clock(host); in sdhci_setup_host()
4301 host->clk_mul = FIELD_GET(SDHCI_CLOCK_MUL_MASK, host->caps1); in sdhci_setup_host()
4309 if (host->clk_mul) in sdhci_setup_host()
4310 host->clk_mul += 1; in sdhci_setup_host()
4315 max_clk = host->max_clk; in sdhci_setup_host()
4317 if (host->ops->get_min_clock) in sdhci_setup_host()
4318 mmc->f_min = host->ops->get_min_clock(host); in sdhci_setup_host()
4319 else if (host->version >= SDHCI_SPEC_300) { in sdhci_setup_host()
4320 if (host->clk_mul) in sdhci_setup_host()
4321 max_clk = host->max_clk * host->clk_mul; in sdhci_setup_host()
4326 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; in sdhci_setup_host()
4328 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; in sdhci_setup_host()
4330 if (!mmc->f_max || mmc->f_max > max_clk) in sdhci_setup_host()
4331 mmc->f_max = max_clk; in sdhci_setup_host()
4333 if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { in sdhci_setup_host()
4334 host->timeout_clk = FIELD_GET(SDHCI_TIMEOUT_CLK_MASK, host->caps); in sdhci_setup_host()
4336 if (host->caps & SDHCI_TIMEOUT_CLK_UNIT) in sdhci_setup_host()
4337 host->timeout_clk *= 1000; in sdhci_setup_host()
4339 if (host->timeout_clk == 0) { in sdhci_setup_host()
4340 if (!host->ops->get_timeout_clock) { in sdhci_setup_host()
4343 ret = -ENODEV; in sdhci_setup_host()
4347 host->timeout_clk = in sdhci_setup_host()
4348 DIV_ROUND_UP(host->ops->get_timeout_clock(host), in sdhci_setup_host()
4353 host->timeout_clk = override_timeout_clk; in sdhci_setup_host()
4355 mmc->max_busy_timeout = host->ops->get_max_timeout_count ? in sdhci_setup_host()
4356 host->ops->get_max_timeout_count(host) : 1 << 27; in sdhci_setup_host()
4357 mmc->max_busy_timeout /= host->timeout_clk; in sdhci_setup_host()
4360 if (host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT && in sdhci_setup_host()
4361 !host->ops->get_max_timeout_count) in sdhci_setup_host()
4362 mmc->max_busy_timeout = 0; in sdhci_setup_host()
4364 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23; in sdhci_setup_host()
4365 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in sdhci_setup_host()
4367 if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) in sdhci_setup_host()
4368 host->flags |= SDHCI_AUTO_CMD12; in sdhci_setup_host()
4371 * For v3 mode, Auto-CMD23 stuff only works in ADMA or PIO. in sdhci_setup_host()
4372 * For v4 mode, SDMA may use Auto-CMD23 as well. in sdhci_setup_host()
4374 if ((host->version >= SDHCI_SPEC_300) && in sdhci_setup_host()
4375 ((host->flags & SDHCI_USE_ADMA) || in sdhci_setup_host()
4376 !(host->flags & SDHCI_USE_SDMA) || host->v4_mode) && in sdhci_setup_host()
4377 !(host->quirks2 & SDHCI_QUIRK2_ACMD23_BROKEN)) { in sdhci_setup_host()
4378 host->flags |= SDHCI_AUTO_CMD23; in sdhci_setup_host()
4379 DBG("Auto-CMD23 available\n"); in sdhci_setup_host()
4381 DBG("Auto-CMD23 unavailable\n"); in sdhci_setup_host()
4385 * A controller may support 8-bit width, but the board itself in sdhci_setup_host()
4387 * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in in sdhci_setup_host()
4389 * won't assume 8-bit width for hosts without that CAP. in sdhci_setup_host()
4391 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) in sdhci_setup_host()
4392 mmc->caps |= MMC_CAP_4_BIT_DATA; in sdhci_setup_host()
4394 if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) in sdhci_setup_host()
4395 mmc->caps &= ~MMC_CAP_CMD23; in sdhci_setup_host()
4397 if (host->caps & SDHCI_CAN_DO_HISPD) in sdhci_setup_host()
4398 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; in sdhci_setup_host()
4400 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_setup_host()
4402 mmc_gpio_get_cd(host->mmc) < 0) in sdhci_setup_host()
4403 mmc->caps |= MMC_CAP_NEEDS_POLL; in sdhci_setup_host()
4405 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_setup_host()
4407 ret = regulator_enable(mmc->supply.vqmmc); in sdhci_setup_host()
4408 host->sdhci_core_to_disable_vqmmc = !ret; in sdhci_setup_host()
4412 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 1700000, in sdhci_setup_host()
4414 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | in sdhci_setup_host()
4419 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 2700000, in sdhci_setup_host()
4421 host->flags &= ~SDHCI_SIGNALING_330; in sdhci_setup_host()
4426 mmc->supply.vqmmc = ERR_PTR(-EINVAL); in sdhci_setup_host()
4431 if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) { in sdhci_setup_host()
4432 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4436 * (indicated using mmc-hs200-1_8v/mmc-hs400-1_8v dt property), in sdhci_setup_host()
4442 mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HS400_ES); in sdhci_setup_host()
4443 mmc->caps &= ~(MMC_CAP_1_8V_DDR | MMC_CAP_UHS); in sdhci_setup_host()
4446 /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ in sdhci_setup_host()
4447 if (host->caps1 & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4449 mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; in sdhci_setup_host()
4452 if (host->caps1 & SDHCI_SUPPORT_SDR104) { in sdhci_setup_host()
4453 mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4457 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) in sdhci_setup_host()
4458 mmc->caps2 |= MMC_CAP2_HS200; in sdhci_setup_host()
4459 } else if (host->caps1 & SDHCI_SUPPORT_SDR50) { in sdhci_setup_host()
4460 mmc->caps |= MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4463 if (host->quirks2 & SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 && in sdhci_setup_host()
4464 (host->caps1 & SDHCI_SUPPORT_HS400)) in sdhci_setup_host()
4465 mmc->caps2 |= MMC_CAP2_HS400; in sdhci_setup_host()
4467 if ((mmc->caps2 & MMC_CAP2_HSX00_1_2V) && in sdhci_setup_host()
4468 (IS_ERR(mmc->supply.vqmmc) || in sdhci_setup_host()
4469 !regulator_is_supported_voltage(mmc->supply.vqmmc, 1100000, in sdhci_setup_host()
4471 mmc->caps2 &= ~MMC_CAP2_HSX00_1_2V; in sdhci_setup_host()
4473 if ((host->caps1 & SDHCI_SUPPORT_DDR50) && in sdhci_setup_host()
4474 !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50)) in sdhci_setup_host()
4475 mmc->caps |= MMC_CAP_UHS_DDR50; in sdhci_setup_host()
4478 if (host->caps1 & SDHCI_USE_SDR50_TUNING) in sdhci_setup_host()
4479 host->flags |= SDHCI_SDR50_NEEDS_TUNING; in sdhci_setup_host()
4482 if (host->caps1 & SDHCI_DRIVER_TYPE_A) in sdhci_setup_host()
4483 mmc->caps |= MMC_CAP_DRIVER_TYPE_A; in sdhci_setup_host()
4484 if (host->caps1 & SDHCI_DRIVER_TYPE_C) in sdhci_setup_host()
4485 mmc->caps |= MMC_CAP_DRIVER_TYPE_C; in sdhci_setup_host()
4486 if (host->caps1 & SDHCI_DRIVER_TYPE_D) in sdhci_setup_host()
4487 mmc->caps |= MMC_CAP_DRIVER_TYPE_D; in sdhci_setup_host()
4489 /* Initial value for re-tuning timer count */ in sdhci_setup_host()
4490 host->tuning_count = FIELD_GET(SDHCI_RETUNING_TIMER_COUNT_MASK, in sdhci_setup_host()
4491 host->caps1); in sdhci_setup_host()
4494 * In case Re-tuning Timer is not disabled, the actual value of in sdhci_setup_host()
4495 * re-tuning timer will be 2 ^ (n - 1). in sdhci_setup_host()
4497 if (host->tuning_count) in sdhci_setup_host()
4498 host->tuning_count = 1 << (host->tuning_count - 1); in sdhci_setup_host()
4500 /* Re-tuning mode supported by the Host Controller */ in sdhci_setup_host()
4501 host->tuning_mode = FIELD_GET(SDHCI_RETUNING_MODE_MASK, host->caps1); in sdhci_setup_host()
4513 if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) { in sdhci_setup_host()
4514 int curr = regulator_get_current_limit(mmc->supply.vmmc); in sdhci_setup_host()
4529 if (host->caps & SDHCI_CAN_VDD_330) { in sdhci_setup_host()
4532 mmc->max_current_330 = FIELD_GET(SDHCI_MAX_CURRENT_330_MASK, in sdhci_setup_host()
4536 if (host->caps & SDHCI_CAN_VDD_300) { in sdhci_setup_host()
4539 mmc->max_current_300 = FIELD_GET(SDHCI_MAX_CURRENT_300_MASK, in sdhci_setup_host()
4543 if (host->caps & SDHCI_CAN_VDD_180) { in sdhci_setup_host()
4546 mmc->max_current_180 = FIELD_GET(SDHCI_MAX_CURRENT_180_MASK, in sdhci_setup_host()
4552 if (host->ocr_mask) in sdhci_setup_host()
4553 ocr_avail = host->ocr_mask; in sdhci_setup_host()
4556 if (mmc->ocr_avail) in sdhci_setup_host()
4557 ocr_avail = mmc->ocr_avail; in sdhci_setup_host()
4559 mmc->ocr_avail = ocr_avail; in sdhci_setup_host()
4560 mmc->ocr_avail_sdio = ocr_avail; in sdhci_setup_host()
4561 if (host->ocr_avail_sdio) in sdhci_setup_host()
4562 mmc->ocr_avail_sdio &= host->ocr_avail_sdio; in sdhci_setup_host()
4563 mmc->ocr_avail_sd = ocr_avail; in sdhci_setup_host()
4564 if (host->ocr_avail_sd) in sdhci_setup_host()
4565 mmc->ocr_avail_sd &= host->ocr_avail_sd; in sdhci_setup_host()
4567 mmc->ocr_avail_sd &= ~MMC_VDD_165_195; in sdhci_setup_host()
4568 mmc->ocr_avail_mmc = ocr_avail; in sdhci_setup_host()
4569 if (host->ocr_avail_mmc) in sdhci_setup_host()
4570 mmc->ocr_avail_mmc &= host->ocr_avail_mmc; in sdhci_setup_host()
4572 if (mmc->ocr_avail == 0) { in sdhci_setup_host()
4575 ret = -ENODEV; in sdhci_setup_host()
4579 if ((mmc->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | in sdhci_setup_host()
4582 (mmc->caps2 & (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V))) in sdhci_setup_host()
4583 host->flags |= SDHCI_SIGNALING_180; in sdhci_setup_host()
4585 if (mmc->caps2 & MMC_CAP2_HSX00_1_2V) in sdhci_setup_host()
4586 host->flags |= SDHCI_SIGNALING_120; in sdhci_setup_host()
4588 spin_lock_init(&host->lock); in sdhci_setup_host()
4595 mmc->max_req_size = 524288; in sdhci_setup_host()
4601 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4602 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4603 } else if (host->flags & SDHCI_USE_SDMA) { in sdhci_setup_host()
4604 mmc->max_segs = 1; in sdhci_setup_host()
4608 mmc->max_req_size = min(mmc->max_req_size, in sdhci_setup_host()
4612 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4620 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4621 if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) in sdhci_setup_host()
4622 mmc->max_seg_size = 65535; in sdhci_setup_host()
4624 mmc->max_seg_size = 65536; in sdhci_setup_host()
4626 mmc->max_seg_size = mmc->max_req_size; in sdhci_setup_host()
4633 if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { in sdhci_setup_host()
4634 mmc->max_blk_size = 2; in sdhci_setup_host()
4636 mmc->max_blk_size = (host->caps & SDHCI_MAX_BLOCK_MASK) >> in sdhci_setup_host()
4638 if (mmc->max_blk_size >= 3) { in sdhci_setup_host()
4641 mmc->max_blk_size = 0; in sdhci_setup_host()
4645 mmc->max_blk_size = 512 << mmc->max_blk_size; in sdhci_setup_host()
4650 mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; in sdhci_setup_host()
4652 if (mmc->max_segs == 1) in sdhci_setup_host()
4653 /* This may alter mmc->*_blk_* parameters */ in sdhci_setup_host()
4659 if (host->sdhci_core_to_disable_vqmmc) in sdhci_setup_host()
4660 regulator_disable(mmc->supply.vqmmc); in sdhci_setup_host()
4662 if (host->align_buffer) in sdhci_setup_host()
4663 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4664 host->adma_table_sz, host->align_buffer, in sdhci_setup_host()
4665 host->align_addr); in sdhci_setup_host()
4666 host->adma_table = NULL; in sdhci_setup_host()
4667 host->align_buffer = NULL; in sdhci_setup_host()
4675 struct mmc_host *mmc = host->mmc; in sdhci_cleanup_host()
4677 if (host->sdhci_core_to_disable_vqmmc) in sdhci_cleanup_host()
4678 regulator_disable(mmc->supply.vqmmc); in sdhci_cleanup_host()
4680 if (host->align_buffer) in sdhci_cleanup_host()
4681 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_cleanup_host()
4682 host->adma_table_sz, host->align_buffer, in sdhci_cleanup_host()
4683 host->align_addr); in sdhci_cleanup_host()
4685 if (host->use_external_dma) in sdhci_cleanup_host()
4688 host->adma_table = NULL; in sdhci_cleanup_host()
4689 host->align_buffer = NULL; in sdhci_cleanup_host()
4696 struct mmc_host *mmc = host->mmc; in __sdhci_add_host()
4699 if ((mmc->caps2 & MMC_CAP2_CQE) && in __sdhci_add_host()
4700 (host->quirks & SDHCI_QUIRK_BROKEN_CQE)) { in __sdhci_add_host()
4701 mmc->caps2 &= ~MMC_CAP2_CQE; in __sdhci_add_host()
4702 mmc->cqe_ops = NULL; in __sdhci_add_host()
4705 host->complete_wq = alloc_workqueue("sdhci", flags, 0); in __sdhci_add_host()
4706 if (!host->complete_wq) in __sdhci_add_host()
4707 return -ENOMEM; in __sdhci_add_host()
4709 INIT_WORK(&host->complete_work, sdhci_complete_work); in __sdhci_add_host()
4711 timer_setup(&host->timer, sdhci_timeout_timer, 0); in __sdhci_add_host()
4712 timer_setup(&host->data_timer, sdhci_timeout_data_timer, 0); in __sdhci_add_host()
4714 init_waitqueue_head(&host->buf_ready_int); in __sdhci_add_host()
4718 ret = request_threaded_irq(host->irq, sdhci_irq, sdhci_thread_irq, in __sdhci_add_host()
4722 mmc_hostname(mmc), host->irq, ret); in __sdhci_add_host()
4738 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), in __sdhci_add_host()
4739 host->use_external_dma ? "External DMA" : in __sdhci_add_host()
4740 (host->flags & SDHCI_USE_ADMA) ? in __sdhci_add_host()
4741 (host->flags & SDHCI_USE_64_BIT_DMA) ? "ADMA 64-bit" : "ADMA" : in __sdhci_add_host()
4742 (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); in __sdhci_add_host()
4754 free_irq(host->irq, host); in __sdhci_add_host()
4756 destroy_workqueue(host->complete_wq); in __sdhci_add_host()
4785 struct mmc_host *mmc = host->mmc; in sdhci_remove_host()
4789 spin_lock_irqsave(&host->lock, flags); in sdhci_remove_host()
4791 host->flags |= SDHCI_DEVICE_DEAD; in sdhci_remove_host()
4796 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_remove_host()
4799 spin_unlock_irqrestore(&host->lock, flags); in sdhci_remove_host()
4813 free_irq(host->irq, host); in sdhci_remove_host()
4815 del_timer_sync(&host->timer); in sdhci_remove_host()
4816 del_timer_sync(&host->data_timer); in sdhci_remove_host()
4818 destroy_workqueue(host->complete_wq); in sdhci_remove_host()
4820 if (host->sdhci_core_to_disable_vqmmc) in sdhci_remove_host()
4821 regulator_disable(mmc->supply.vqmmc); in sdhci_remove_host()
4823 if (host->align_buffer) in sdhci_remove_host()
4824 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_remove_host()
4825 host->adma_table_sz, host->align_buffer, in sdhci_remove_host()
4826 host->align_addr); in sdhci_remove_host()
4828 if (host->use_external_dma) in sdhci_remove_host()
4831 host->adma_table = NULL; in sdhci_remove_host()
4832 host->align_buffer = NULL; in sdhci_remove_host()
4839 mmc_free_host(host->mmc); in sdhci_free_host()