Lines Matching refs:tegra_host
180 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_readw() local
181 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
216 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_writel() local
217 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_writel()
298 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_is_pad_and_regulator_valid() local
309 if (!(tegra_host->soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL)) in tegra_sdhci_is_pad_and_regulator_valid()
322 return tegra_host->pad_control_available; in tegra_sdhci_is_pad_and_regulator_valid()
331 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_set_tap() local
332 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_set_tap()
361 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_reset() local
362 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_reset()
370 tegra_sdhci_set_tap(host, tegra_host->default_tap); in tegra_sdhci_reset()
398 clk_ctrl |= tegra_host->default_trim << SDHCI_CLOCK_CTRL_TRIM_SHIFT; in tegra_sdhci_reset()
409 tegra_host->pad_calib_required = true; in tegra_sdhci_reset()
412 tegra_host->ddr_signaling = false; in tegra_sdhci_reset()
451 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_set_padctrl() local
453 &tegra_host->autocal_offsets; in tegra_sdhci_set_padctrl()
462 if (tegra_host->pinctrl_state_1v8_drv) { in tegra_sdhci_set_padctrl()
464 tegra_host->pinctrl_state_1v8_drv; in tegra_sdhci_set_padctrl()
470 if (tegra_host->pinctrl_state_3v3_drv) { in tegra_sdhci_set_padctrl()
472 tegra_host->pinctrl_state_3v3_drv; in tegra_sdhci_set_padctrl()
480 ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc, in tegra_sdhci_set_padctrl()
496 if (!tegra_host->pad_control_available) in tegra_sdhci_set_padctrl()
500 ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc, in tegra_sdhci_set_padctrl()
501 tegra_host->pinctrl_state_1v8); in tegra_sdhci_set_padctrl()
506 ret = pinctrl_select_state(tegra_host->pinctrl_sdmmc, in tegra_sdhci_set_padctrl()
507 tegra_host->pinctrl_state_3v3); in tegra_sdhci_set_padctrl()
520 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_pad_autocalib() local
522 tegra_host->autocal_offsets; in tegra_sdhci_pad_autocalib()
582 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_parse_pad_autocal_dt() local
584 &tegra_host->autocal_offsets; in tegra_sdhci_parse_pad_autocal_dt()
641 if (!(tegra_host->soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL)) in tegra_sdhci_parse_pad_autocal_dt()
648 if (!IS_ERR(tegra_host->pinctrl_state_3v3) && in tegra_sdhci_parse_pad_autocal_dt()
649 (tegra_host->pinctrl_state_3v3_drv == NULL)) in tegra_sdhci_parse_pad_autocal_dt()
659 if (!IS_ERR(tegra_host->pinctrl_state_3v3) && in tegra_sdhci_parse_pad_autocal_dt()
660 (tegra_host->pinctrl_state_3v3_drv == NULL)) in tegra_sdhci_parse_pad_autocal_dt()
670 if (!IS_ERR(tegra_host->pinctrl_state_1v8) && in tegra_sdhci_parse_pad_autocal_dt()
671 (tegra_host->pinctrl_state_1v8_drv == NULL)) in tegra_sdhci_parse_pad_autocal_dt()
681 if (!IS_ERR(tegra_host->pinctrl_state_1v8) && in tegra_sdhci_parse_pad_autocal_dt()
682 (tegra_host->pinctrl_state_1v8_drv == NULL)) in tegra_sdhci_parse_pad_autocal_dt()
693 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_request() local
694 ktime_t since_calib = ktime_sub(ktime_get(), tegra_host->last_calib); in tegra_sdhci_request()
699 tegra_host->last_calib = ktime_get(); in tegra_sdhci_request()
708 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_parse_tap_and_trim() local
712 &tegra_host->default_tap); in tegra_sdhci_parse_tap_and_trim()
714 tegra_host->default_tap = 0; in tegra_sdhci_parse_tap_and_trim()
717 &tegra_host->default_trim); in tegra_sdhci_parse_tap_and_trim()
719 tegra_host->default_trim = 0; in tegra_sdhci_parse_tap_and_trim()
722 &tegra_host->dqs_trim); in tegra_sdhci_parse_tap_and_trim()
724 tegra_host->dqs_trim = 0x11; in tegra_sdhci_parse_tap_and_trim()
730 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_parse_dt() local
733 tegra_host->enable_hwcq = true; in tegra_sdhci_parse_dt()
735 tegra_host->enable_hwcq = false; in tegra_sdhci_parse_dt()
744 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_set_clock() local
762 host_clk = tegra_host->ddr_signaling ? clock * 2 : clock; in tegra_sdhci_set_clock()
764 tegra_host->curr_clk_rate = clk_get_rate(pltfm_host->clk); in tegra_sdhci_set_clock()
765 if (tegra_host->ddr_signaling) in tegra_sdhci_set_clock()
772 if (tegra_host->pad_calib_required) { in tegra_sdhci_set_clock()
774 tegra_host->pad_calib_required = false; in tegra_sdhci_set_clock()
843 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_tap_correction() local
901 tegra_host->tuned_tap_delay = tap; in tegra_sdhci_tap_correction()
916 tegra_host->tuned_tap_delay = edge1 - fixed_tap; in tegra_sdhci_tap_correction()
918 tegra_host->tuned_tap_delay = edge1 + fixed_tap; in tegra_sdhci_tap_correction()
925 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_post_tuning() local
926 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_post_tuning()
935 tegra_host->tuned_tap_delay = (val & SDHCI_CLOCK_CTRL_TAP_MASK) >> in tegra_sdhci_post_tuning()
940 clk_rate_mhz = tegra_host->curr_clk_rate / USEC_PER_SEC; in tegra_sdhci_post_tuning()
977 tegra_sdhci_set_tap(host, tegra_host->tuned_tap_delay); in tegra_sdhci_post_tuning()
996 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_set_uhs_signaling() local
1003 tegra_host->ddr_signaling = false; in tegra_sdhci_set_uhs_signaling()
1019 tegra_host->ddr_signaling = true; in tegra_sdhci_set_uhs_signaling()
1043 if (tegra_host->tuned_tap_delay && !set_default_tap) in tegra_sdhci_set_uhs_signaling()
1044 tegra_sdhci_set_tap(host, tegra_host->tuned_tap_delay); in tegra_sdhci_set_uhs_signaling()
1046 tegra_sdhci_set_tap(host, tegra_host->default_tap); in tegra_sdhci_set_uhs_signaling()
1049 tegra_sdhci_set_dqs_trim(host, tegra_host->dqs_trim); in tegra_sdhci_set_uhs_signaling()
1094 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_start_signal_voltage_switch() local
1109 if (tegra_host->pad_calib_required) in sdhci_tegra_start_signal_voltage_switch()
1116 struct sdhci_tegra *tegra_host) in tegra_sdhci_init_pinctrl_info() argument
1118 tegra_host->pinctrl_sdmmc = devm_pinctrl_get(dev); in tegra_sdhci_init_pinctrl_info()
1119 if (IS_ERR(tegra_host->pinctrl_sdmmc)) { in tegra_sdhci_init_pinctrl_info()
1121 PTR_ERR(tegra_host->pinctrl_sdmmc)); in tegra_sdhci_init_pinctrl_info()
1125 tegra_host->pinctrl_state_1v8_drv = pinctrl_lookup_state( in tegra_sdhci_init_pinctrl_info()
1126 tegra_host->pinctrl_sdmmc, "sdmmc-1v8-drv"); in tegra_sdhci_init_pinctrl_info()
1127 if (IS_ERR(tegra_host->pinctrl_state_1v8_drv)) { in tegra_sdhci_init_pinctrl_info()
1128 if (PTR_ERR(tegra_host->pinctrl_state_1v8_drv) == -ENODEV) in tegra_sdhci_init_pinctrl_info()
1129 tegra_host->pinctrl_state_1v8_drv = NULL; in tegra_sdhci_init_pinctrl_info()
1132 tegra_host->pinctrl_state_3v3_drv = pinctrl_lookup_state( in tegra_sdhci_init_pinctrl_info()
1133 tegra_host->pinctrl_sdmmc, "sdmmc-3v3-drv"); in tegra_sdhci_init_pinctrl_info()
1134 if (IS_ERR(tegra_host->pinctrl_state_3v3_drv)) { in tegra_sdhci_init_pinctrl_info()
1135 if (PTR_ERR(tegra_host->pinctrl_state_3v3_drv) == -ENODEV) in tegra_sdhci_init_pinctrl_info()
1136 tegra_host->pinctrl_state_3v3_drv = NULL; in tegra_sdhci_init_pinctrl_info()
1139 tegra_host->pinctrl_state_3v3 = in tegra_sdhci_init_pinctrl_info()
1140 pinctrl_lookup_state(tegra_host->pinctrl_sdmmc, "sdmmc-3v3"); in tegra_sdhci_init_pinctrl_info()
1141 if (IS_ERR(tegra_host->pinctrl_state_3v3)) { in tegra_sdhci_init_pinctrl_info()
1143 PTR_ERR(tegra_host->pinctrl_state_3v3)); in tegra_sdhci_init_pinctrl_info()
1147 tegra_host->pinctrl_state_1v8 = in tegra_sdhci_init_pinctrl_info()
1148 pinctrl_lookup_state(tegra_host->pinctrl_sdmmc, "sdmmc-1v8"); in tegra_sdhci_init_pinctrl_info()
1149 if (IS_ERR(tegra_host->pinctrl_state_1v8)) { in tegra_sdhci_init_pinctrl_info()
1151 PTR_ERR(tegra_host->pinctrl_state_1v8)); in tegra_sdhci_init_pinctrl_info()
1155 tegra_host->pad_control_available = true; in tegra_sdhci_init_pinctrl_info()
1163 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in tegra_sdhci_voltage_switch() local
1164 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_voltage_switch()
1167 tegra_host->pad_calib_required = true; in tegra_sdhci_voltage_switch()
1213 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_update_dcmd_desc() local
1214 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in sdhci_tegra_update_dcmd_desc()
1558 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_add_host() local
1563 if (!tegra_host->enable_hwcq) in sdhci_tegra_add_host()
1609 struct sdhci_tegra *tegra_host; in sdhci_tegra_probe() local
1618 host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*tegra_host)); in sdhci_tegra_probe()
1623 tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_probe()
1624 tegra_host->ddr_signaling = false; in sdhci_tegra_probe()
1625 tegra_host->pad_calib_required = false; in sdhci_tegra_probe()
1626 tegra_host->pad_control_available = false; in sdhci_tegra_probe()
1627 tegra_host->soc_data = soc_data; in sdhci_tegra_probe()
1630 rc = tegra_sdhci_init_pinctrl_info(&pdev->dev, tegra_host); in sdhci_tegra_probe()
1651 if (tegra_host->soc_data->nvquirks & NVQUIRK_ENABLE_DDR50) in sdhci_tegra_probe()
1659 tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power", in sdhci_tegra_probe()
1661 if (IS_ERR(tegra_host->power_gpio)) { in sdhci_tegra_probe()
1662 rc = PTR_ERR(tegra_host->power_gpio); in sdhci_tegra_probe()
1700 tegra_host->tmclk = clk; in sdhci_tegra_probe()
1712 tegra_host->rst = devm_reset_control_get_exclusive(&pdev->dev, in sdhci_tegra_probe()
1714 if (IS_ERR(tegra_host->rst)) { in sdhci_tegra_probe()
1715 rc = PTR_ERR(tegra_host->rst); in sdhci_tegra_probe()
1720 rc = reset_control_assert(tegra_host->rst); in sdhci_tegra_probe()
1726 rc = reset_control_deassert(tegra_host->rst); in sdhci_tegra_probe()
1739 reset_control_assert(tegra_host->rst); in sdhci_tegra_probe()
1743 clk_disable_unprepare(tegra_host->tmclk); in sdhci_tegra_probe()
1754 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host); in sdhci_tegra_remove() local
1758 reset_control_assert(tegra_host->rst); in sdhci_tegra_remove()
1761 clk_disable_unprepare(tegra_host->tmclk); in sdhci_tegra_remove()