Lines Matching refs:scratch_32
159 u32 scratch_32; in o2_pci_set_baseclk() local
162 O2_SD_PLL_SETTING, &scratch_32); in o2_pci_set_baseclk()
164 scratch_32 &= 0x0000FFFF; in o2_pci_set_baseclk()
165 scratch_32 |= value; in o2_pci_set_baseclk()
168 O2_SD_PLL_SETTING, scratch_32); in o2_pci_set_baseclk()
238 u32 scratch_32 = 0; in sdhci_o2_dll_recovery() local
253 scratch_32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_dll_recovery()
254 scratch_32 |= O2_PLL_SOFT_RESET; in sdhci_o2_dll_recovery()
255 sdhci_writel(host, scratch_32, O2_PLL_DLL_WDT_CONTROL1); in sdhci_o2_dll_recovery()
259 &scratch_32); in sdhci_o2_dll_recovery()
261 scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET; in sdhci_o2_dll_recovery()
262 pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG4, scratch_32); in sdhci_o2_dll_recovery()
380 u32 scratch_32; in o2_pci_led_enable() local
384 O2_SD_FUNC_REG0, &scratch_32); in o2_pci_led_enable()
388 scratch_32 &= ~O2_SD_FREG0_LEDOFF; in o2_pci_led_enable()
390 O2_SD_FUNC_REG0, scratch_32); in o2_pci_led_enable()
393 O2_SD_TEST_REG, &scratch_32); in o2_pci_led_enable()
397 scratch_32 |= O2_SD_LED_ENABLE; in o2_pci_led_enable()
399 O2_SD_TEST_REG, scratch_32); in o2_pci_led_enable()
404 u32 scratch_32; in sdhci_pci_o2_fujin2_pci_init() local
407 ret = pci_read_config_dword(chip->pdev, O2_SD_DEV_CTRL, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
410 scratch_32 &= ~((1 << 12) | (1 << 13) | (1 << 14)); in sdhci_pci_o2_fujin2_pci_init()
411 pci_write_config_dword(chip->pdev, O2_SD_DEV_CTRL, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
414 ret = pci_read_config_dword(chip->pdev, O2_SD_MISC_REG5, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
417 scratch_32 &= ~((1 << 19) | (1 << 11)); in sdhci_pci_o2_fujin2_pci_init()
418 scratch_32 |= (1 << 10); in sdhci_pci_o2_fujin2_pci_init()
419 pci_write_config_dword(chip->pdev, O2_SD_MISC_REG5, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
422 ret = pci_read_config_dword(chip->pdev, O2_SD_TEST_REG, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
425 scratch_32 |= (1 << 4); in sdhci_pci_o2_fujin2_pci_init()
426 pci_write_config_dword(chip->pdev, O2_SD_TEST_REG, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
432 ret = pci_read_config_dword(chip->pdev, O2_SD_LD0_CTRL, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
435 scratch_32 &= ~(3 << 12); in sdhci_pci_o2_fujin2_pci_init()
436 pci_write_config_dword(chip->pdev, O2_SD_LD0_CTRL, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
439 ret = pci_read_config_dword(chip->pdev, O2_SD_CAP_REG0, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
442 scratch_32 &= ~(0x01FE); in sdhci_pci_o2_fujin2_pci_init()
443 scratch_32 |= 0x00CC; in sdhci_pci_o2_fujin2_pci_init()
444 pci_write_config_dword(chip->pdev, O2_SD_CAP_REG0, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
447 O2_SD_TUNING_CTRL, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
450 scratch_32 &= ~(0x000000FF); in sdhci_pci_o2_fujin2_pci_init()
451 scratch_32 |= 0x00000066; in sdhci_pci_o2_fujin2_pci_init()
452 pci_write_config_dword(chip->pdev, O2_SD_TUNING_CTRL, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
456 O2_SD_UHS2_L1_CTRL, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
459 scratch_32 &= ~(0x000000FC); in sdhci_pci_o2_fujin2_pci_init()
460 scratch_32 |= 0x00000084; in sdhci_pci_o2_fujin2_pci_init()
461 pci_write_config_dword(chip->pdev, O2_SD_UHS2_L1_CTRL, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
464 ret = pci_read_config_dword(chip->pdev, O2_SD_FUNC_REG3, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
467 scratch_32 &= ~((1 << 21) | (1 << 30)); in sdhci_pci_o2_fujin2_pci_init()
469 pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
472 ret = pci_read_config_dword(chip->pdev, O2_SD_CAPS, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
475 scratch_32 &= ~(0xf0000000); in sdhci_pci_o2_fujin2_pci_init()
476 scratch_32 |= 0x30000000; in sdhci_pci_o2_fujin2_pci_init()
477 pci_write_config_dword(chip->pdev, O2_SD_CAPS, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
480 O2_SD_MISC_CTRL4, &scratch_32); in sdhci_pci_o2_fujin2_pci_init()
483 scratch_32 &= ~(0x000f0000); in sdhci_pci_o2_fujin2_pci_init()
484 scratch_32 |= 0x00080000; in sdhci_pci_o2_fujin2_pci_init()
485 pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL4, scratch_32); in sdhci_pci_o2_fujin2_pci_init()
528 u32 scratch_32; in sdhci_pci_o2_set_clock() local
545 pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32); in sdhci_pci_o2_set_clock()
547 if ((scratch_32 & 0xFFFF0000) != 0x2c280000) in sdhci_pci_o2_set_clock()
639 u32 scratch_32; in sdhci_pci_o2_probe() local
711 &scratch_32); in sdhci_pci_o2_probe()
712 scratch_32 = ((scratch_32 & 0xFF000000) >> 24); in sdhci_pci_o2_probe()
715 if ((scratch_32 == 0x11) || (scratch_32 == 0x12)) { in sdhci_pci_o2_probe()
716 scratch_32 = 0x25100000; in sdhci_pci_o2_probe()
718 o2_pci_set_baseclk(chip, scratch_32); in sdhci_pci_o2_probe()
721 &scratch_32); in sdhci_pci_o2_probe()
724 scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET; in sdhci_pci_o2_probe()
727 scratch_32); in sdhci_pci_o2_probe()
742 O2_SD_CLK_SETTING, &scratch_32); in sdhci_pci_o2_probe()
746 scratch_32 &= ~(0xFF00); in sdhci_pci_o2_probe()
747 scratch_32 |= 0x07E0C800; in sdhci_pci_o2_probe()
749 O2_SD_CLK_SETTING, scratch_32); in sdhci_pci_o2_probe()
752 O2_SD_CLKREQ, &scratch_32); in sdhci_pci_o2_probe()
755 scratch_32 |= 0x3; in sdhci_pci_o2_probe()
756 pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32); in sdhci_pci_o2_probe()
759 O2_SD_PLL_SETTING, &scratch_32); in sdhci_pci_o2_probe()
763 scratch_32 &= ~(0x1F3F070E); in sdhci_pci_o2_probe()
764 scratch_32 |= 0x18270106; in sdhci_pci_o2_probe()
766 O2_SD_PLL_SETTING, scratch_32); in sdhci_pci_o2_probe()
770 O2_SD_CAP_REG2, &scratch_32); in sdhci_pci_o2_probe()
773 scratch_32 &= ~(0xE0); in sdhci_pci_o2_probe()
775 O2_SD_CAP_REG2, scratch_32); in sdhci_pci_o2_probe()
800 O2_SD_PLL_SETTING, &scratch_32); in sdhci_pci_o2_probe()
802 if ((scratch_32 & 0xff000000) == 0x01000000) { in sdhci_pci_o2_probe()
803 scratch_32 &= 0x0000FFFF; in sdhci_pci_o2_probe()
804 scratch_32 |= 0x1F340000; in sdhci_pci_o2_probe()
807 O2_SD_PLL_SETTING, scratch_32); in sdhci_pci_o2_probe()
809 scratch_32 &= 0x0000FFFF; in sdhci_pci_o2_probe()
810 scratch_32 |= 0x25100000; in sdhci_pci_o2_probe()
813 O2_SD_PLL_SETTING, scratch_32); in sdhci_pci_o2_probe()
817 &scratch_32); in sdhci_pci_o2_probe()
818 scratch_32 |= (1 << 22); in sdhci_pci_o2_probe()
820 O2_SD_FUNC_REG4, scratch_32); in sdhci_pci_o2_probe()
827 pci_read_config_dword(chip->pdev, O2_SD_MISC_CTRL2, &scratch_32); in sdhci_pci_o2_probe()
828 scratch_32 &= 0xFFE7FFFF; in sdhci_pci_o2_probe()
829 scratch_32 |= 0x00180000; in sdhci_pci_o2_probe()
830 pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL2, scratch_32); in sdhci_pci_o2_probe()