138 #define msm_host_readl(msm_host, host, offset) \  argument
139 	msm_host->var_ops->msm_readl_relaxed(host, offset)
141 #define msm_host_writel(msm_host, val, host, offset) \  argument
142 	msm_host->var_ops->msm_writel_relaxed(val, host, offset)
296 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_priv_msm_offset()  local
298 	return msm_host->offset;  in sdhci_priv_msm_offset()
309 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_mci_variant_readl_relaxed()  local
311 	return readl_relaxed(msm_host->core_mem + offset);  in sdhci_msm_mci_variant_readl_relaxed()
324 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_mci_variant_writel_relaxed()  local
326 	writel_relaxed(val, msm_host->core_mem + offset);  in sdhci_msm_mci_variant_writel_relaxed()
357 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in msm_set_clock_rate_for_bus_mode()  local
359 	struct clk *core_clk = msm_host->bulk_clks[0].clk;  in msm_set_clock_rate_for_bus_mode()
370 	msm_host->clk_rate = clock;  in msm_set_clock_rate_for_bus_mode()
611 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in msm_init_cm_dll()  local
616 					msm_host->offset;  in msm_init_cm_dll()
618 	if (msm_host->use_14lpp_dll_reset && !IS_ERR_OR_NULL(msm_host->xo_clk))  in msm_init_cm_dll()
619 		xo_clk = clk_get_rate(msm_host->xo_clk);  in msm_init_cm_dll()
632 	if (msm_host->dll_config)  in msm_init_cm_dll()
633 		writel_relaxed(msm_host->dll_config,  in msm_init_cm_dll()
636 	if (msm_host->use_14lpp_dll_reset) {  in msm_init_cm_dll()
662 	if (!msm_host->dll_config)  in msm_init_cm_dll()
665 	if (msm_host->use_14lpp_dll_reset &&  in msm_init_cm_dll()
666 	    !IS_ERR_OR_NULL(msm_host->xo_clk)) {  in msm_init_cm_dll()
702 	if (msm_host->use_14lpp_dll_reset) {  in msm_init_cm_dll()
703 		if (!msm_host->dll_config)  in msm_init_cm_dll()
716 	if (msm_host->uses_tassadar_dll) {  in msm_init_cm_dll()
725 		if (msm_host->clk_rate < 150000000)  in msm_init_cm_dll()
765 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in msm_hc_select_default()  local
768 					msm_host->offset;  in msm_hc_select_default()
770 	if (!msm_host->use_cdclp533) {  in msm_hc_select_default()
805 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in msm_hc_select_hs400()  local
810 					msm_host->offset;  in msm_hc_select_hs400()
822 	if ((msm_host->tuning_done || ios.enhanced_strobe) &&  in msm_hc_select_hs400()
823 	    !msm_host->calibration_done) {  in msm_hc_select_hs400()
831 	if (!msm_host->clk_rate && !msm_host->use_cdclp533) {  in msm_hc_select_hs400()
887 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_cdclp533_calibration()  local
891 					msm_host->offset;  in sdhci_msm_cdclp533_calibration()
904 	ret = msm_config_cm_dll_phase(host, msm_host->saved_tuning_phase);  in sdhci_msm_cdclp533_calibration()
993 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_cm_dll_sdc4_calibration()  local
1006 	if (msm_host->updated_ddr_cfg)  in sdhci_msm_cm_dll_sdc4_calibration()
1010 	writel_relaxed(msm_host->ddr_config, host->ioaddr + ddr_cfg_offset);  in sdhci_msm_cm_dll_sdc4_calibration()
1044 	if (!msm_host->use_14lpp_dll_reset) {  in sdhci_msm_cm_dll_sdc4_calibration()
1066 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_hs400_dll_calibration()  local
1071 					msm_host->offset;  in sdhci_msm_hs400_dll_calibration()
1086 					      msm_host->saved_tuning_phase);  in sdhci_msm_hs400_dll_calibration()
1096 	if (msm_host->use_cdclp533)  in sdhci_msm_hs400_dll_calibration()
1127 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_restore_sdr_dll_config()  local
1143 	ret = msm_config_cm_dll_phase(host, msm_host->saved_tuning_phase);  in sdhci_msm_restore_sdr_dll_config()
1177 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_execute_tuning()  local
1180 		msm_host->use_cdr = false;  in sdhci_msm_execute_tuning()
1186 	msm_host->use_cdr = true;  in sdhci_msm_execute_tuning()
1192 	msm_host->tuning_done = 0;  in sdhci_msm_execute_tuning()
1258 		msm_host->saved_tuning_phase = phase;  in sdhci_msm_execute_tuning()
1271 		msm_host->tuning_done = true;  in sdhci_msm_execute_tuning()
1284 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_hs400()  local
1288 	    (msm_host->tuning_done || ios->enhanced_strobe) &&  in sdhci_msm_hs400()
1289 	    !msm_host->calibration_done) {  in sdhci_msm_hs400()
1292 			msm_host->calibration_done = true;  in sdhci_msm_hs400()
1304 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_set_uhs_signaling()  local
1308 					msm_host->offset;  in sdhci_msm_set_uhs_signaling()
1365 		msm_host->calibration_done = false;  in sdhci_msm_set_uhs_signaling()
1376 static int sdhci_msm_set_pincfg(struct sdhci_msm_host *msm_host, bool level)  in sdhci_msm_set_pincfg()  argument
1378 	struct platform_device *pdev = msm_host->pdev;  in sdhci_msm_set_pincfg()
1397 static int msm_toggle_vqmmc(struct sdhci_msm_host *msm_host,  in msm_toggle_vqmmc()  argument
1403 	if (msm_host->vqmmc_enabled == level)  in msm_toggle_vqmmc()
1408 		if (msm_host->caps_0 & CORE_3_0V_SUPPORT)  in msm_toggle_vqmmc()
1410 		else if (msm_host->caps_0 & CORE_1_8V_SUPPORT)  in msm_toggle_vqmmc()
1413 		if (msm_host->caps_0 & CORE_VOLT_SUPPORT) {  in msm_toggle_vqmmc()
1430 		msm_host->vqmmc_enabled = level;  in msm_toggle_vqmmc()
1435 static int msm_config_vqmmc_mode(struct sdhci_msm_host *msm_host,  in msm_config_vqmmc_mode()  argument
1448 static int sdhci_msm_set_vqmmc(struct sdhci_msm_host *msm_host,  in sdhci_msm_set_vqmmc()  argument
1471 		ret = msm_config_vqmmc_mode(msm_host, mmc, level);  in sdhci_msm_set_vqmmc()
1473 		ret = msm_toggle_vqmmc(msm_host, mmc, level);  in sdhci_msm_set_vqmmc()
1478 static inline void sdhci_msm_init_pwr_irq_wait(struct sdhci_msm_host *msm_host)  in sdhci_msm_init_pwr_irq_wait()  argument
1480 	init_waitqueue_head(&msm_host->pwr_irq_wait);  in sdhci_msm_init_pwr_irq_wait()
1484 		struct sdhci_msm_host *msm_host)  in sdhci_msm_complete_pwr_irq_wait()  argument
1486 	wake_up(&msm_host->pwr_irq_wait);  in sdhci_msm_complete_pwr_irq_wait()
1501 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_check_power_status()  local
1505 					msm_host->offset;  in sdhci_msm_check_power_status()
1509 			msm_host->curr_pwr_state, msm_host->curr_io_level);  in sdhci_msm_check_power_status()
1517 	if (!msm_host->mci_removed)  in sdhci_msm_check_power_status()
1518 		val = msm_host_readl(msm_host, host,  in sdhci_msm_check_power_status()
1542 	if ((req_type & msm_host->curr_pwr_state) ||  in sdhci_msm_check_power_status()
1543 			(req_type & msm_host->curr_io_level))  in sdhci_msm_check_power_status()
1552 		if (!wait_event_timeout(msm_host->pwr_irq_wait,  in sdhci_msm_check_power_status()
1553 				msm_host->pwr_irq_flag,  in sdhci_msm_check_power_status()
1555 			dev_warn(&msm_host->pdev->dev,  in sdhci_msm_check_power_status()
1566 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_dump_pwr_ctrl_regs()  local
1568 					msm_host->offset;  in sdhci_msm_dump_pwr_ctrl_regs()
1572 		msm_host_readl(msm_host, host, msm_offset->core_pwrctl_status),  in sdhci_msm_dump_pwr_ctrl_regs()
1573 		msm_host_readl(msm_host, host, msm_offset->core_pwrctl_mask),  in sdhci_msm_dump_pwr_ctrl_regs()
1574 		msm_host_readl(msm_host, host, msm_offset->core_pwrctl_ctl));  in sdhci_msm_dump_pwr_ctrl_regs()
1580 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_handle_pwr_irq()  local
1586 	const struct sdhci_msm_offset *msm_offset = msm_host->offset;  in sdhci_msm_handle_pwr_irq()
1588 	irq_status = msm_host_readl(msm_host, host,  in sdhci_msm_handle_pwr_irq()
1592 	msm_host_writel(msm_host, irq_status, host,  in sdhci_msm_handle_pwr_irq()
1602 	while (irq_status & msm_host_readl(msm_host, host,  in sdhci_msm_handle_pwr_irq()
1611 		msm_host_writel(msm_host, irq_status, host,  in sdhci_msm_handle_pwr_irq()
1630 			ret = sdhci_msm_set_vqmmc(msm_host, mmc,  in sdhci_msm_handle_pwr_irq()
1633 			ret = sdhci_msm_set_pincfg(msm_host,  in sdhci_msm_handle_pwr_irq()
1667 	msm_host_writel(msm_host, irq_ack, host,  in sdhci_msm_handle_pwr_irq()
1674 	if (msm_host->caps_0 & CORE_VOLT_SUPPORT) {  in sdhci_msm_handle_pwr_irq()
1692 				(msm_host->caps_0 & CORE_3_0V_SUPPORT))  in sdhci_msm_handle_pwr_irq()
1695 				(msm_host->caps_0 & CORE_1_8V_SUPPORT))  in sdhci_msm_handle_pwr_irq()
1704 		msm_host->curr_pwr_state = pwr_state;  in sdhci_msm_handle_pwr_irq()
1706 		msm_host->curr_io_level = io_level;  in sdhci_msm_handle_pwr_irq()
1709 		mmc_hostname(msm_host->mmc), __func__, irq, irq_status,  in sdhci_msm_handle_pwr_irq()
1717 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_pwr_irq()  local
1720 	msm_host->pwr_irq_flag = 1;  in sdhci_msm_pwr_irq()
1721 	sdhci_msm_complete_pwr_irq_wait(msm_host);  in sdhci_msm_pwr_irq()
1730 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_get_max_clock()  local
1731 	struct clk *core_clk = msm_host->bulk_clks[0].clk;  in sdhci_msm_get_max_clock()
1778 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_set_clock()  local
1781 		msm_host->clk_rate = clock;  in sdhci_msm_set_clock()
1821 static bool sdhci_msm_ice_supported(struct sdhci_msm_host *msm_host)  in sdhci_msm_ice_supported()  argument
1823 	struct device *dev = mmc_dev(msm_host->mmc);  in sdhci_msm_ice_supported()
1824 	u32 regval = sdhci_msm_ice_readl(msm_host, QCOM_ICE_REG_VERSION);  in sdhci_msm_ice_supported()
1840 	regval = sdhci_msm_ice_readl(msm_host, QCOM_ICE_REG_FUSE_SETTING);  in sdhci_msm_ice_supported()
1855 static int sdhci_msm_ice_init(struct sdhci_msm_host *msm_host,  in sdhci_msm_ice_init()  argument
1858 	struct mmc_host *mmc = msm_host->mmc;  in sdhci_msm_ice_init()
1866 	res = platform_get_resource_byname(msm_host->pdev, IORESOURCE_MEM,  in sdhci_msm_ice_init()
1878 	msm_host->ice_mem = devm_ioremap_resource(dev, res);  in sdhci_msm_ice_init()
1879 	if (IS_ERR(msm_host->ice_mem)) {  in sdhci_msm_ice_init()
1880 		err = PTR_ERR(msm_host->ice_mem);  in sdhci_msm_ice_init()
1885 	if (!sdhci_msm_ice_supported(msm_host))  in sdhci_msm_ice_init()
1896 static void sdhci_msm_ice_low_power_mode_enable(struct sdhci_msm_host *msm_host)  in sdhci_msm_ice_low_power_mode_enable()  argument
1900 	regval = sdhci_msm_ice_readl(msm_host, QCOM_ICE_REG_ADVANCED_CONTROL);  in sdhci_msm_ice_low_power_mode_enable()
1906 	sdhci_msm_ice_writel(msm_host, regval, QCOM_ICE_REG_ADVANCED_CONTROL);  in sdhci_msm_ice_low_power_mode_enable()
1909 static void sdhci_msm_ice_optimization_enable(struct sdhci_msm_host *msm_host)  in sdhci_msm_ice_optimization_enable()  argument
1914 	regval = sdhci_msm_ice_readl(msm_host, QCOM_ICE_REG_ADVANCED_CONTROL);  in sdhci_msm_ice_optimization_enable()
1918 	sdhci_msm_ice_writel(msm_host, regval, QCOM_ICE_REG_ADVANCED_CONTROL);  in sdhci_msm_ice_optimization_enable()
1934 static int sdhci_msm_ice_wait_bist_status(struct sdhci_msm_host *msm_host)  in sdhci_msm_ice_wait_bist_status()  argument
1939 	err = readl_poll_timeout(msm_host->ice_mem + QCOM_ICE_REG_BIST_STATUS,  in sdhci_msm_ice_wait_bist_status()
1943 		dev_err(mmc_dev(msm_host->mmc),  in sdhci_msm_ice_wait_bist_status()
1948 static void sdhci_msm_ice_enable(struct sdhci_msm_host *msm_host)  in sdhci_msm_ice_enable()  argument
1950 	if (!(msm_host->mmc->caps2 & MMC_CAP2_CRYPTO))  in sdhci_msm_ice_enable()
1952 	sdhci_msm_ice_low_power_mode_enable(msm_host);  in sdhci_msm_ice_enable()
1953 	sdhci_msm_ice_optimization_enable(msm_host);  in sdhci_msm_ice_enable()
1954 	sdhci_msm_ice_wait_bist_status(msm_host);  in sdhci_msm_ice_enable()
1957 static int __maybe_unused sdhci_msm_ice_resume(struct sdhci_msm_host *msm_host)  in sdhci_msm_ice_resume()  argument
1959 	if (!(msm_host->mmc->caps2 & MMC_CAP2_CRYPTO))  in sdhci_msm_ice_resume()
1961 	return sdhci_msm_ice_wait_bist_status(msm_host);  in sdhci_msm_ice_resume()
2015 static inline int sdhci_msm_ice_init(struct sdhci_msm_host *msm_host,  in sdhci_msm_ice_init()  argument
2021 static inline void sdhci_msm_ice_enable(struct sdhci_msm_host *msm_host)  in sdhci_msm_ice_enable()  argument
2026 sdhci_msm_ice_resume(struct sdhci_msm_host *msm_host)  in sdhci_msm_ice_resume()  argument
2054 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_cqe_enable()  local
2057 	sdhci_msm_ice_enable(msm_host);  in sdhci_msm_cqe_enable()
2120 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_cqe_add_host()  local
2144 	msm_host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;  in sdhci_msm_cqe_add_host()
2149 	ret = sdhci_msm_ice_init(msm_host, cq_host);  in sdhci_msm_cqe_add_host()
2197 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in __sdhci_msm_check_write()  local
2213 		msm_host->transfer_mode = val;  in __sdhci_msm_check_write()
2216 		if (!msm_host->use_cdr)  in __sdhci_msm_check_write()
2218 		if ((msm_host->transfer_mode & SDHCI_TRNS_READ) &&  in __sdhci_msm_check_write()
2228 		msm_host->pwr_irq_flag = 0;  in __sdhci_msm_check_write()
2263 static void sdhci_msm_set_regulator_caps(struct sdhci_msm_host *msm_host)  in sdhci_msm_set_regulator_caps()  argument
2265 	struct mmc_host *mmc = msm_host->mmc;  in sdhci_msm_set_regulator_caps()
2269 	const struct sdhci_msm_offset *msm_offset = msm_host->offset;  in sdhci_msm_set_regulator_caps()
2287 		u32 io_level = msm_host->curr_io_level;  in sdhci_msm_set_regulator_caps()
2301 	msm_host->caps_0 |= caps;  in sdhci_msm_set_regulator_caps()
2312 static int sdhci_msm_register_vreg(struct sdhci_msm_host *msm_host)  in sdhci_msm_register_vreg()  argument
2316 	ret = mmc_regulator_get_supply(msm_host->mmc);  in sdhci_msm_register_vreg()
2320 	sdhci_msm_set_regulator_caps(msm_host);  in sdhci_msm_register_vreg()
2384 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_dump_vendor_regs()  local
2385 	const struct sdhci_msm_offset *msm_offset = msm_host->offset;  in sdhci_msm_dump_vendor_regs()
2484 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_get_of_property()  local
2487 				&msm_host->ddr_config))  in sdhci_msm_get_of_property()
2488 		msm_host->ddr_config = DDR_CONFIG_POR_VAL;  in sdhci_msm_get_of_property()
2490 	of_property_read_u32(node, "qcom,dll-config", &msm_host->dll_config);  in sdhci_msm_get_of_property()
2535 	struct sdhci_msm_host *msm_host;  in sdhci_msm_probe()  local
2545 	host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host));  in sdhci_msm_probe()
2551 	msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_probe()
2552 	msm_host->mmc = host->mmc;  in sdhci_msm_probe()
2553 	msm_host->pdev = pdev;  in sdhci_msm_probe()
2565 	msm_host->mci_removed = var_info->mci_removed;  in sdhci_msm_probe()
2566 	msm_host->restore_dll_config = var_info->restore_dll_config;  in sdhci_msm_probe()
2567 	msm_host->var_ops = var_info->var_ops;  in sdhci_msm_probe()
2568 	msm_host->offset = var_info->offset;  in sdhci_msm_probe()
2569 	msm_host->uses_tassadar_dll = var_info->uses_tassadar_dll;  in sdhci_msm_probe()
2571 	msm_offset = msm_host->offset;  in sdhci_msm_probe()
2576 	msm_host->saved_tuning_phase = INVALID_TUNING_PHASE;  in sdhci_msm_probe()
2583 	msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");  in sdhci_msm_probe()
2584 	if (!IS_ERR(msm_host->bus_clk)) {  in sdhci_msm_probe()
2586 		ret = clk_set_rate(msm_host->bus_clk, INT_MAX);  in sdhci_msm_probe()
2589 		ret = clk_prepare_enable(msm_host->bus_clk);  in sdhci_msm_probe()
2601 	msm_host->bulk_clks[1].clk = clk;  in sdhci_msm_probe()
2610 	msm_host->bulk_clks[0].clk = clk;  in sdhci_msm_probe()
2617 	msm_host->opp_table = dev_pm_opp_set_clkname(&pdev->dev, "core");  in sdhci_msm_probe()
2618 	if (IS_ERR(msm_host->opp_table)) {  in sdhci_msm_probe()
2619 		ret = PTR_ERR(msm_host->opp_table);  in sdhci_msm_probe()
2638 	msm_host->bulk_clks[2].clk = clk;  in sdhci_msm_probe()
2643 	msm_host->bulk_clks[3].clk = clk;  in sdhci_msm_probe()
2648 	msm_host->bulk_clks[4].clk = clk;  in sdhci_msm_probe()
2650 	ret = clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),  in sdhci_msm_probe()
2651 				      msm_host->bulk_clks);  in sdhci_msm_probe()
2659 	msm_host->xo_clk = devm_clk_get(&pdev->dev, "xo");  in sdhci_msm_probe()
2660 	if (IS_ERR(msm_host->xo_clk)) {  in sdhci_msm_probe()
2661 		ret = PTR_ERR(msm_host->xo_clk);  in sdhci_msm_probe()
2665 	if (!msm_host->mci_removed) {  in sdhci_msm_probe()
2666 		msm_host->core_mem = devm_platform_ioremap_resource(pdev, 1);  in sdhci_msm_probe()
2667 		if (IS_ERR(msm_host->core_mem)) {  in sdhci_msm_probe()
2668 			ret = PTR_ERR(msm_host->core_mem);  in sdhci_msm_probe()
2677 	if (!msm_host->mci_removed) {  in sdhci_msm_probe()
2679 		msm_host_writel(msm_host, HC_MODE_EN, host,  in sdhci_msm_probe()
2681 		config = msm_host_readl(msm_host, host,  in sdhci_msm_probe()
2684 		msm_host_writel(msm_host, config, host,  in sdhci_msm_probe()
2693 	core_version = msm_host_readl(msm_host, host,  in sdhci_msm_probe()
2702 		msm_host->use_14lpp_dll_reset = true;  in sdhci_msm_probe()
2709 		msm_host->use_cdclp533 = true;  in sdhci_msm_probe()
2723 		msm_host->updated_ddr_cfg = true;  in sdhci_msm_probe()
2725 	ret = sdhci_msm_register_vreg(msm_host);  in sdhci_msm_probe()
2745 	msm_host->pwr_irq = platform_get_irq_byname(pdev, "pwr_irq");  in sdhci_msm_probe()
2746 	if (msm_host->pwr_irq < 0) {  in sdhci_msm_probe()
2747 		ret = msm_host->pwr_irq;  in sdhci_msm_probe()
2751 	sdhci_msm_init_pwr_irq_wait(msm_host);  in sdhci_msm_probe()
2753 	msm_host_writel(msm_host, INT_MASK, host,  in sdhci_msm_probe()
2756 	ret = devm_request_threaded_irq(&pdev->dev, msm_host->pwr_irq, NULL,  in sdhci_msm_probe()
2764 	msm_host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_NEED_RSP_BUSY;  in sdhci_msm_probe()
2793 	clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),  in sdhci_msm_probe()
2794 				   msm_host->bulk_clks);  in sdhci_msm_probe()
2798 	dev_pm_opp_put_clkname(msm_host->opp_table);  in sdhci_msm_probe()
2800 	if (!IS_ERR(msm_host->bus_clk))  in sdhci_msm_probe()
2801 		clk_disable_unprepare(msm_host->bus_clk);  in sdhci_msm_probe()
2811 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_remove()  local
2818 	dev_pm_opp_put_clkname(msm_host->opp_table);  in sdhci_msm_remove()
2823 	clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),  in sdhci_msm_remove()
2824 				   msm_host->bulk_clks);  in sdhci_msm_remove()
2825 	if (!IS_ERR(msm_host->bus_clk))  in sdhci_msm_remove()
2826 		clk_disable_unprepare(msm_host->bus_clk);  in sdhci_msm_remove()
2835 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_runtime_suspend()  local
2839 	clk_bulk_disable_unprepare(ARRAY_SIZE(msm_host->bulk_clks),  in sdhci_msm_runtime_suspend()
2840 				   msm_host->bulk_clks);  in sdhci_msm_runtime_suspend()
2849 	struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);  in sdhci_msm_runtime_resume()  local
2852 	ret = clk_bulk_prepare_enable(ARRAY_SIZE(msm_host->bulk_clks),  in sdhci_msm_runtime_resume()
2853 				       msm_host->bulk_clks);  in sdhci_msm_runtime_resume()
2860 	if (msm_host->restore_dll_config && msm_host->clk_rate) {  in sdhci_msm_runtime_resume()
2866 	dev_pm_opp_set_rate(dev, msm_host->clk_rate);  in sdhci_msm_runtime_resume()
2868 	return sdhci_msm_ice_resume(msm_host);  in sdhci_msm_runtime_resume()