Lines Matching refs:sdr_set_field
593 static void sdr_set_field(void __iomem *reg, u32 field, u32 val) in sdr_set_field() function
700 sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1); in msdc_dma_setup()
706 sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT, in msdc_dma_setup()
774 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, in msdc_set_timeout()
783 sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC, in msdc_set_busy_timeout()
881 sdr_set_field(host->base + MSDC_CFG, in msdc_set_mclk()
885 sdr_set_field(host->base + MSDC_CFG, in msdc_set_mclk()
935 sdr_set_field(host->base + tune_reg, in msdc_set_mclk()
1037 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1); in msdc_start_data()
1363 sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP, in msdc_data_xfer_done()
1625 sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE, in msdc_init_hw()
1643 sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0); in msdc_init_hw()
1645 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1); in msdc_init_hw()
1650 sdr_set_field(host->base + MSDC_PATCH_BIT1, in msdc_init_hw()
1662 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1672 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1674 sdr_set_field(host->base + MSDC_PATCH_BIT2, in msdc_init_hw()
1720 sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3); in msdc_init_hw()
1896 sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY, in msdc_set_cmd_delay()
1899 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY, in msdc_set_cmd_delay()
1908 sdr_set_field(host->top_base + EMMC_TOP_CONTROL, in msdc_set_data_delay()
1911 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY, in msdc_set_data_delay()
1929 sdr_set_field(host->base + tune_reg, in msdc_tune_response()
1994 sdr_set_field(host->base + tune_reg, in msdc_tune_response()
2002 sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY, in msdc_tune_response()
2020 sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2); in hs400_tune_response()
2024 sdr_set_field(host->base + MSDC_PAD_TUNE, in hs400_tune_response()
2033 sdr_set_field(host->base + PAD_CMD_TUNE, in hs400_tune_response()
2051 sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3, in hs400_tune_response()
2067 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, in msdc_tune_data()
2122 sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL, in msdc_tune_together()
2230 sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2); in msdc_prepare_hs400_tuning()
2300 sdr_set_field(host->base + MSDC_DMA_CTRL, in msdc_cqe_disable()