766 	int ret;  in dw_mci_idmac_start_dma()  local
769 		ret = dw_mci_prepare_desc64(host, host->data, sg_len);  in dw_mci_idmac_start_dma()
771 		ret = dw_mci_prepare_desc32(host, host->data, sg_len);  in dw_mci_idmac_start_dma()
773 	if (ret)  in dw_mci_idmac_start_dma()
800 	return ret;  in dw_mci_idmac_start_dma()
826 	int ret = 0;  in dw_mci_edmac_start_dma()  local
845 	ret = dmaengine_slave_config(host->dms->ch, &cfg);  in dw_mci_edmac_start_dma()
846 	if (ret) {  in dw_mci_edmac_start_dma()
883 		int ret = PTR_ERR(host->dms->ch);  in dw_mci_edmac_init()  local
888 		return ret;  in dw_mci_edmac_init()
1472 	int ret;  in dw_mci_set_ios()  local
1514 			ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc,  in dw_mci_set_ios()
1516 			if (ret) {  in dw_mci_set_ios()
1534 				ret = regulator_enable(mmc->supply.vqmmc);  in dw_mci_set_ios()
1535 				if (ret < 0)  in dw_mci_set_ios()
1602 	int ret;  in dw_mci_switch_voltage()  local
1619 		ret = mmc_regulator_set_vqmmc(mmc, ios);  in dw_mci_switch_voltage()
1620 		if (ret < 0) {  in dw_mci_switch_voltage()
1623 					 ret, uhs & v18 ? "1.8" : "3.3");  in dw_mci_switch_voltage()
1624 			return ret;  in dw_mci_switch_voltage()
1781 	bool ret = false;  in dw_mci_reset()  local
1804 			ret = true;  in dw_mci_reset()
1836 	ret = true;  in dw_mci_reset()
1842 	return ret;  in dw_mci_reset()
2907 	int ret;  in dw_mci_init_slot()  local
2923 	ret = mmc_regulator_get_supply(mmc);  in dw_mci_init_slot()
2924 	if (ret)  in dw_mci_init_slot()
2930 	ret = mmc_of_parse(mmc);  in dw_mci_init_slot()
2931 	if (ret)  in dw_mci_init_slot()
2934 	ret = dw_mci_init_slot_caps(slot);  in dw_mci_init_slot()
2935 	if (ret)  in dw_mci_init_slot()
2968 	ret = mmc_add_host(mmc);  in dw_mci_init_slot()
2969 	if (ret)  in dw_mci_init_slot()
2980 	return ret;  in dw_mci_init_slot()
3239 	int ret;  in dw_mci_parse_dt()  local
3269 		ret = drv_data->parse_dt(host);  in dw_mci_parse_dt()
3270 		if (ret)  in dw_mci_parse_dt()
3271 			return ERR_PTR(ret);  in dw_mci_parse_dt()
3324 	int width, i, ret = 0;  in dw_mci_probe()  local
3338 		ret = clk_prepare_enable(host->biu_clk);  in dw_mci_probe()
3339 		if (ret) {  in dw_mci_probe()
3341 			return ret;  in dw_mci_probe()
3368 		ret = clk_prepare_enable(host->ciu_clk);  in dw_mci_probe()
3369 		if (ret) {  in dw_mci_probe()
3375 			ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz);  in dw_mci_probe()
3376 			if (ret)  in dw_mci_probe()
3387 		ret = -ENODEV;  in dw_mci_probe()
3398 		ret = drv_data->init(host);  in dw_mci_probe()
3399 		if (ret) {  in dw_mci_probe()
3444 		ret = -ENODEV;  in dw_mci_probe()
3498 	ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt,  in dw_mci_probe()
3500 	if (ret)  in dw_mci_probe()
3518 	ret = dw_mci_init_slot(host);  in dw_mci_probe()
3519 	if (ret) {  in dw_mci_probe()
3560 	return ret;  in dw_mci_probe()
3611 	int ret = 0;  in dw_mci_runtime_resume()  local
3617 		ret = clk_prepare_enable(host->biu_clk);  in dw_mci_runtime_resume()
3618 		if (ret)  in dw_mci_runtime_resume()
3619 			return ret;  in dw_mci_runtime_resume()
3622 	ret = clk_prepare_enable(host->ciu_clk);  in dw_mci_runtime_resume()
3623 	if (ret)  in dw_mci_runtime_resume()
3628 		ret = -ENODEV;  in dw_mci_runtime_resume()
3651 		ret = mci_readl(host, CTRL);  in dw_mci_runtime_resume()
3652 		ret |= SDMMC_CTRL_USE_IDMAC;  in dw_mci_runtime_resume()
3653 		mci_writel(host, CTRL, ret);  in dw_mci_runtime_resume()
3655 		ret = mci_readl(host, INTMASK);  in dw_mci_runtime_resume()
3656 		ret &= ~SDMMC_INT_HTO;  in dw_mci_runtime_resume()
3657 		mci_writel(host, INTMASK, ret);  in dw_mci_runtime_resume()
3681 	return ret;  in dw_mci_runtime_resume()