Lines Matching refs:DAVINCI_MMCCTL

33 #define DAVINCI_MMCCTL       0x00 /* Control Register                  */  macro
711 		writel((readl(host->base + DAVINCI_MMCCTL) &  in mmc_davinci_set_ios()
713 			host->base + DAVINCI_MMCCTL);  in mmc_davinci_set_ios()
718 			writel((readl(host->base + DAVINCI_MMCCTL) &  in mmc_davinci_set_ios()
720 				host->base + DAVINCI_MMCCTL);  in mmc_davinci_set_ios()
722 			writel(readl(host->base + DAVINCI_MMCCTL) |  in mmc_davinci_set_ios()
724 				host->base + DAVINCI_MMCCTL);  in mmc_davinci_set_ios()
729 			writel(readl(host->base + DAVINCI_MMCCTL) &  in mmc_davinci_set_ios()
731 				host->base + DAVINCI_MMCCTL);  in mmc_davinci_set_ios()
733 			writel(readl(host->base + DAVINCI_MMCCTL) &  in mmc_davinci_set_ios()
735 				host->base + DAVINCI_MMCCTL);  in mmc_davinci_set_ios()
832 	temp = readl(host->base + DAVINCI_MMCCTL);  in mmc_davinci_reset_ctrl()
838 	writel(temp, host->base + DAVINCI_MMCCTL);  in mmc_davinci_reset_ctrl()