Lines Matching refs:UPDATE

30 #define NOT_RST_ANALOG(x)		UPDATE(x, 6, 6)
32 #define NOT_RST_DIGITAL(x) UPDATE(x, 5, 5)
34 #define REG_CLK_INV(x) UPDATE(x, 4, 4)
36 #define VCLK_INV(x) UPDATE(x, 3, 3)
38 #define REG_CLK_SOURCE(x) UPDATE(x, 2, 2)
40 #define PWR_OFF(x) UPDATE(x, 1, 1)
42 #define INT_POL(x) UPDATE(x, 0, 0)
46 #define VIDEO_INPUT_SDR_RGB444 UPDATE(0x0, 3, 1)
47 #define VIDEO_INPUT_DDR_RGB444 UPDATE(0x5, 3, 1)
48 #define VIDEO_INPUT_DDR_YCBCR422 UPDATE(0x6, 3, 1)
50 #define DE_SOURCE(x) UPDATE(x, 0, 0)
54 #define VIDEO_OUTPUT_RRGB444 UPDATE(0x0, 7, 6)
55 #define VIDEO_OUTPUT_YCBCR444 UPDATE(0x1, 7, 6)
56 #define VIDEO_OUTPUT_YCBCR422 UPDATE(0x2, 7, 6)
58 #define VIDEO_INPUT_12BITS UPDATE(0x0, 5, 4)
59 #define VIDEO_INPUT_10BITS UPDATE(0x1, 5, 4)
60 #define VIDEO_INPUT_REVERT UPDATE(0x2, 5, 4)
61 #define VIDEO_INPUT_8BITS UPDATE(0x3, 5, 4)
63 #define VIDEO_INPUT_CSP(x) UPDATE(x, 0, 0)
67 #define VIDEO_AUTO_CSC(x) UPDATE(x, 7, 7)
69 #define VIDEO_C0_C2_SWAP(x) UPDATE(x, 0, 0)
79 #define COLOR_DEPTH_NOT_INDICATED(x) UPDATE(x, 4, 4)
81 #define SOF_DISABLE(x) UPDATE(x, 3, 3)
83 #define CSC_ENABLE(x) UPDATE(x, 0, 0)
87 #define AVMUTE_CLEAR(x) UPDATE(x, 7, 7)
89 #define AVMUTE_ENABLE(x) UPDATE(x, 6, 6)
91 #define AUDIO_PD(x) UPDATE(x, 2, 2)
93 #define AUDIO_MUTE(x) UPDATE(x, 1, 1)
95 #define VIDEO_MUTE(x) UPDATE(x, 0, 0)
98 #define HSYNC_POLARITY(x) UPDATE(x, 3, 3)
99 #define VSYNC_POLARITY(x) UPDATE(x, 2, 2)
100 #define INETLACE(x) UPDATE(x, 1, 1)
101 #define EXTERANL_VIDEO(x) UPDATE(x, 0, 0)
125 #define CTS_SOURCE(x) UPDATE(x, 7, 7)
133 #define DOWN_SAMPLE(x) UPDATE(x, 6, 5)
140 #define AUDIO_SOURCE(x) UPDATE(x, 4, 3)
141 #define MCLK_ENABLE(x) UPDATE(x, 2, 2)
150 #define MCLK_RATIO(x) UPDATE(x, 1, 0)
171 #define I2S_CHANNEL(x) UPDATE(x, 5, 2)
179 #define I2S_MODE(x) UPDATE(x, 1, 0)
193 #define AUDIO_STATUS_NLPCM(x) UPDATE(x, 7, 7)
218 #define PACKET_GCP_EN(x) UPDATE(x, 7, 7)
220 #define PACKET_MSI_EN(x) UPDATE(x, 6, 6)
222 #define PACKET_SDI_EN(x) UPDATE(x, 5, 5)
224 #define PACKET_VSI_EN(x) UPDATE(x, 4, 4)
257 #define HDMI_DVI(x) UPDATE(x, 1, 1)
274 #define MASK_INT_HOTPLUG(x) UPDATE(x, 5, 5)
282 #define TMDS_CLK_SOURCE(x) UPDATE(x, 5, 5)
284 #define PHASE_CLK(x) UPDATE(x, 4, 4)
286 #define TMDS_PHASE_SEL(x) UPDATE(x, 3, 3)
288 #define BANDGAP_PWR(x) UPDATE(x, 2, 2)
290 #define PLL_PWR_DOWN(x) UPDATE(x, 1, 1)
292 #define TMDS_CHG_PWR_DOWN(x) UPDATE(x, 0, 0)
295 #define CLK_CHG_PWR(x) UPDATE(x, 3, 3)
296 #define DATA_CHG_PWR(x) UPDATE(x, 2, 0)
299 #define CLK_MAIN_DRIVER(x) UPDATE(x, 7, 4)
300 #define DATA_MAIN_DRIVER(x) UPDATE(x, 3, 0)
303 #define PRE_EMPHASIS(x) UPDATE(x, 6, 4)
304 #define CLK_PRE_DRIVER(x) UPDATE(x, 3, 2)
305 #define DATA_PRE_DRIVER(x) UPDATE(x, 1, 0)
308 #define FEEDBACK_DIV_LOW(x) UPDATE(x, 7, 0)
310 #define FEEDBACK_DIV_HIGH(x) UPDATE(x, 0, 0)
313 #define PRE_DIV_RATIO(x) UPDATE(x, 4, 0)