Lines Matching +full:10 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Author: Guochun Huang <hero.huang@rock-chips.com>
39 #define SYS_CTRL0_GVI_EN BIT(0)
40 #define SYS_CTRL0_AUTO_GATING BIT(1)
41 #define SYS_CTRL0_FRM_RST_EN BIT(2)
42 #define SYS_CTRL0_FRM_RST_MODE BIT(3)
47 #define SYS_CTRL0_SECTION_NUM_MASK GENMASK(11, 10)
48 #define SYS_CTRL0_SECTION_NUM(x) UPDATE(x, 11, 10)
49 #define SYS_CTRL0_CDR_ENDIAN_SWAP BIT(12)
50 #define SYS_CTRL0_PACK_BYTE_SWAP BIT(13)
51 #define SYS_CTRL0_PACK_ENDIAN_SWAP BIT(14)
52 #define SYS_CTRL0_ENC8B10B_ENDIAN_SWAP BIT(15)
53 #define SYS_CTRL0_CDR_EN BIT(16)
54 #define SYS_CTRL0_ALN_EN BIT(17)
55 #define SYS_CTRL0_NOR_EN BIT(18)
56 #define SYS_CTRL0_ALN_NOR_MODE BIT(19)
60 #define SYS_CTRL0_SCRAMBLER_EN BIT(20)
61 #define SYS_CTRL0_ENCODE8B10B_EN BIT(21)
62 #define SYS_CTRL0_INIT_RD_EN BIT(22)
63 #define SYS_CTRL0_INIT_RD_VALUE BIT(23)
64 #define SYS_CTRL0_FORCE_HTPDN_EN BIT(24)
65 #define SYS_CTRL0_FORCE_HTPDN_VALUE BIT(25)
66 #define SYS_CTRL0_FORCE_PLL_EN BIT(26)
67 #define SYS_CTRL0_FORCE_PLL_VALUE BIT(27)
68 #define SYS_CTRL0_FORCE_LOCKN_EN BIT(28)
69 #define SYS_CTRL0_FORCE_LOCKN_VALUE BIT(29)
74 #define SYS_CTRL1_DUAL_PIXEL_EN BIT(4)
75 #define SYS_CTRL1_TIMING_ALIGN_EN BIT(8)
76 #define SYS_CTRL1_LANE_ALIGN_EN BIT(9)
78 #define SYS_CTRL1_DUAL_PIXEL_SWAP BIT(12)
79 #define SYS_CTRL1_RB_SWAP BIT(13)
80 #define SYS_CTRL1_YC_SWAP BIT(14)
81 #define SYS_CTRL1_WHOLE_FRM_EN BIT(16)
82 #define SYS_CTRL1_NOR_PROTECT BIT(17)
83 #define SYS_CTRL1_RD_WCNT_UPDATE BIT(31)
98 #define SYS_CTRL3_LANE2_SEL_MASK GENMASK(10, 8)
99 #define SYS_CTRL3_LANE2_SEL(x) UPDATE(x, 10, 8)
113 #define SYS_RST_SOFT_RST BIT(0)
120 #define STATUS_HTDPN BIT(4)
121 #define STATUS_LOCKN BIT(5)
122 #define STATUS_PLL_LOCKN BIT(6)
139 #define WAIT_LOCKN_WAIT_LOCKN_TIME_EN BIT(31)
143 #define WAIT_HTPDN_WAIT_HTPDN_EN BIT(31)
145 #define INTR_EN_INTR_FRM_ST_EN BIT(0)
146 #define INTR_EN_INTR_PLL_LOCK_EN BIT(1)
147 #define INTR_EN_INTR_HTPDN_EN BIT(2)
148 #define INTR_EN_INTR_LOCKN_EN BIT(3)
149 #define INTR_EN_INTR_PLL_TIMEOUT_EN BIT(4)
150 #define INTR_EN_INTR_HTPDN_TIMEOUT_EN BIT(5)
151 #define INTR_EN_INTR_LOCKN_TIMEOUT_EN BIT(6)
152 #define INTR_EN_INTR_LINE_FLAG0_EN BIT(8)
153 #define INTR_EN_INTR_LINE_FLAG1_EN BIT(9)
154 #define INTR_EN_INTR_AFIFO_OVERFLOW_EN BIT(10)
155 #define INTR_EN_INTR_AFIFO_UNDERFLOW_EN BIT(11)
156 #define INTR_EN_INTR_PLL_ERR_EN BIT(12)
157 #define INTR_EN_INTR_HTPDN_ERR_EN BIT(13)
158 #define INTR_EN_INTR_LOCKN_ERR_EN BIT(14)
160 #define INTR_CLR_INTR_FRM_ST_CLR BIT(0)
161 #define INTR_CLR_INTR_PLL_LOCK_CLR BIT(1)
162 #define INTR_CLR_INTR_HTPDN_CLR BIT(2)
163 #define INTR_CLR_INTR_LOCKN_CLR BIT(3)
164 #define INTR_CLR_INTR_PLL_TIMEOUT_CLR BIT(4)
165 #define INTR_CLR_INTR_HTPDN_TIMEOUT_CLR BIT(5)
166 #define INTR_CLR_INTR_LOCKN_TIMEOUT_CLR BIT(6)
167 #define INTR_CLR_INTR_LINE_FLAG0_CLR BIT(8)
168 #define INTR_CLR_INTR_LINE_FLAG1_CLR BIT(9)
169 #define INTR_CLR_INTR_AFIFO_OVERFLOW_CLR BIT(10)
170 #define INTR_CLR_INTR_AFIFO_UNDERFLOW_CLR BIT(11)
171 #define INTR_CLR_INTR_PLL_ERR_CLR BIT(12)
172 #define INTR_CLR_INTR_HTPDN_ERR_CLR BIT(13)
173 #define INTR_CLR_INTR_LOCKN_ERR_CLR BIT(14)
175 #define INTR_RAW_STATUS_RAW_INTR_FRM_ST BIT(0)
176 #define INTR_RAW_STATUS_RAW_INTR_PLL_LOCK BIT(1)
177 #define INTR_RAW_STATUS_RAW_INTR_HTPDN BIT(2)
178 #define INTR_RAW_STATUS_RAW_INTR_LOCKN BIT(3)
179 #define INTR_RAW_STATUS_RAW_INTR_PLL_TIMEOUT BIT(4)
180 #define INTR_RAW_STATUS_RAW_INTR_HTPDN_TIMEOUT BIT(5)
181 #define INTR_RAW_STATUS_RAW_INTR_LOCKN_TIMEOUT BIT(6)
182 #define INTR_RAW_STATUS_RAW_INTR_LINE_FLAG0 BIT(8)
183 #define INTR_RAW_STATUS_RAW_INTR_LINE_FLAG1 BIT(9)
184 #define INTR_RAW_STATUS_RAW_INTR_AFIFO_OVERFLOW BIT(10)
185 #define INTR_RAW_STATUS_RAW_INTR_AFIFO_UNDERFLOW BIT(11)
186 #define INTR_RAW_STATUS_RAW_INTR_PLL_ERR BIT(12)
187 #define INTR_RAW_STATUS_RAW_INTR_HTPDN_ERR BIT(13)
188 #define INTR_RAW_STATUS_RAW_INTR_LOCKN_ERR BIT(14)
190 #define INTR_STATUS_INTR_FRM_ST BIT(0)
191 #define INTR_STATUS_INTR_PLL_LOCK BIT(1)
192 #define INTR_STATUS_INTR_HTPDN BIT(2)
193 #define INTR_STATUS_INTR_LOCKN BIT(3)
194 #define INTR_STATUS_INTR_PLL_TIMEOUT BIT(4)
195 #define INTR_STATUS_INTR_HTPDN_TIMEOUT BIT(5)
196 #define INTR_STATUS_INTR_LOCKN_TIMEOUT BIT(6)
197 #define INTR_STATUS_INTR_LINE_FLAG0 BIT(8)
198 #define INTR_STATUS_INTR_LINE_FLAG1 BIT(9)
199 #define INTR_STATUS_INTR_AFIFO_OVERFLOW BIT(10)
200 #define INTR_STATUS_INTR_AFIFO_UNDERFLOW BIT(11)
201 #define INTR_STATUS_INTR_PLL_ERR BIT(12)
202 #define INTR_STATUS_INTR_HTPDN_ERR BIT(13)
203 #define INTR_STATUS_INTR_LOCKN_ERR BIT(14)
206 #define COLOR_BAR_EN BIT(0)