63 	u32 postdiv1, fbdiv, dsmpd, postdiv2, refdiv, frac, bypass;  in rk628_cru_clk_get_rate_pll()  local
94 	refdiv = (con1 & PLL_REFDIV_MASK) >> PLL_REFDIV_SHIFT;  in rk628_cru_clk_get_rate_pll()
101 	do_div(foutvco, refdiv);  in rk628_cru_clk_get_rate_pll()
106 		do_div(frac_rate, refdiv);  in rk628_cru_clk_get_rate_pll()
123 	u8 dsmpd = 1, postdiv1 = 0, postdiv2 = 0, refdiv = 0;  in rk628_cru_clk_set_rate_pll()  local
186 	for (refdiv = min_refdiv; refdiv <= max_refdiv; refdiv++) {  in rk628_cru_clk_set_rate_pll()
189 		if (fin % refdiv)  in rk628_cru_clk_set_rate_pll()
192 		tmp = (u64)fout * refdiv;  in rk628_cru_clk_set_rate_pll()
199 		do_div(tmp, refdiv);  in rk628_cru_clk_set_rate_pll()
206 			tmp = (u64)frac_rate * refdiv;  in rk628_cru_clk_set_rate_pll()
226 	do_div(foutvco, refdiv);  in rk628_cru_clk_set_rate_pll()
231 		do_div(frac_rate, refdiv);  in rk628_cru_clk_set_rate_pll()
244 			PLL_REFDIV(refdiv));  in rk628_cru_clk_set_rate_pll()