Lines Matching refs:asic_prop

362 	struct asic_fixed_properties *prop = &hdev->asic_prop;  in goya_get_fixed_properties()
567 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_early_init()
622 kfree(hdev->asic_prop.hw_queues_props); in goya_early_init()
636 kfree(hdev->asic_prop.hw_queues_props); in goya_early_fini()
672 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_fetch_psoc_frequency()
707 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_late_init()
1654 qman_base_addr = hdev->asic_prop.sram_base_address + in goya_init_mme_qman()
1761 qman_base_addr = hdev->asic_prop.sram_base_address + base_off; in goya_init_tpc_qman()
2164 int cq_cnt = hdev->asic_prop.completion_queues_count; in goya_enable_msix()
2220 for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++) in goya_sync_irqs()
2239 for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++) { in goya_disable_msix()
2352 dest = hdev->asic_prop.uboot_ver; in goya_read_device_fw_version()
2357 dest = hdev->asic_prop.preboot_ver; in goya_read_device_fw_version()
2446 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_mmu_init()
2505 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_hw_init()
2802 *dma_handle = hdev->asic_prop.sram_base_address; in goya_get_int_queue_base()
3263 hdev->asic_prop.sram_user_base_address, in goya_validate_dma_pkt_host()
3264 hdev->asic_prop.sram_end_address)) { in goya_validate_dma_pkt_host()
3275 hdev->asic_prop.dram_user_base_address, in goya_validate_dma_pkt_host()
3276 hdev->asic_prop.dram_end_address)) { in goya_validate_dma_pkt_host()
3327 hdev->asic_prop.sram_user_base_address, in goya_validate_dma_pkt_no_host()
3328 hdev->asic_prop.sram_end_address)) { in goya_validate_dma_pkt_no_host()
3336 hdev->asic_prop.dram_user_base_address, in goya_validate_dma_pkt_no_host()
3337 hdev->asic_prop.dram_end_address)) { in goya_validate_dma_pkt_no_host()
3404 hdev->asic_prop.pmmu.start_addr, in goya_validate_dma_pkt_mmu()
3405 hdev->asic_prop.pmmu.end_addr)) { in goya_validate_dma_pkt_mmu()
3935 struct asic_fixed_properties *asic_prop = &hdev->asic_prop; in goya_parse_cb_no_ext_queue() local
3945 asic_prop->sram_user_base_address, in goya_parse_cb_no_ext_queue()
3946 asic_prop->sram_end_address)) in goya_parse_cb_no_ext_queue()
3952 asic_prop->dram_user_base_address, in goya_parse_cb_no_ext_queue()
3953 asic_prop->dram_end_address)) in goya_parse_cb_no_ext_queue()
4048 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_debugfs_read32()
4061 } else if (addr < DRAM_PHYS_BASE + hdev->asic_prop.dram_size) { in goya_debugfs_read32()
4104 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_debugfs_write32()
4117 } else if (addr < DRAM_PHYS_BASE + hdev->asic_prop.dram_size) { in goya_debugfs_write32()
4145 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_debugfs_read64()
4162 DRAM_PHYS_BASE + hdev->asic_prop.dram_size - sizeof(u64)) { in goya_debugfs_read64()
4190 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_debugfs_write64()
4205 DRAM_PHYS_BASE + hdev->asic_prop.dram_size - sizeof(u64)) { in goya_debugfs_write64()
4811 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_context_switch()
4847 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_mmu_clear_pgt_range()
4862 u64 addr = hdev->asic_prop.mmu_dram_default_page_addr; in goya_mmu_set_dram_default_page()
4874 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_mmu_add_mappings_for_device_cpu()
4952 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_mmu_remove_device_cpu_mappings()
5122 struct asic_fixed_properties *prop = &hdev->asic_prop; in goya_cpucp_info_get()