360 				u32 tpc_id);
676 	u8 tpc_id;  in _gaudi_init_tpc_mem()  local
724 	for (tpc_id = 0 ; tpc_id < TPC_NUMBER_OF_ENGINES ; tpc_id++) {  in _gaudi_init_tpc_mem()
725 		rc = gaudi_run_tpc_kernel(hdev, dst_addr, tpc_id);  in _gaudi_init_tpc_mem()
1809 	int tpc_id, i;  in gaudi_init_golden_registers()  local
1817 	for (tpc_id = 0, tpc_offset = 0;  in gaudi_init_golden_registers()
1818 				tpc_id < TPC_NUMBER_OF_ENGINES;  in gaudi_init_golden_registers()
1819 				tpc_id++, tpc_offset += TPC_CFG_OFFSET) {  in gaudi_init_golden_registers()
2247 	u32 q_off, tpc_id;  in gaudi_init_tpc_qman()  local
2286 		tpc_id = tpc_offset /  in gaudi_init_tpc_qman()
2304 									tpc_id);  in gaudi_init_tpc_qman()
2332 	int i, tpc_id, internal_q_index;  in gaudi_init_tpc_qmans()  local
2340 	for (tpc_id = 0 ; tpc_id < TPC_NUMBER_OF_ENGINES ; tpc_id++) {  in gaudi_init_tpc_qmans()
2343 						tpc_id * QMAN_STREAMS + i;  in gaudi_init_tpc_qmans()
2359 		WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_HIGH + tpc_id * tpc_delta,  in gaudi_init_tpc_qmans()
2365 				FIELD_PREP(HW_CAP_TPC_MASK, 1 << tpc_id);  in gaudi_init_tpc_qmans()
2410 	int tpc_id;  in gaudi_disable_tpc_qmans()  local
2415 	for (tpc_id = 0 ; tpc_id < TPC_NUMBER_OF_ENGINES ; tpc_id++) {  in gaudi_disable_tpc_qmans()
5631 static bool gaudi_tpc_read_interrupts(struct hl_device *hdev, u8 tpc_id,  in gaudi_tpc_read_interrupts()  argument
5635 	u32 tpc_offset = tpc_id * TPC_CFG_OFFSET, tpc_interrupts_cause, i;  in gaudi_tpc_read_interrupts()
5654 					tpc_id, interrupt_name,  in gaudi_tpc_read_interrupts()
6255 				u32 tpc_id)  in gaudi_run_tpc_kernel()  argument
6262 	offset = tpc_id * (mmTPC1_CFG_STATUS - mmTPC0_CFG_STATUS);  in gaudi_run_tpc_kernel()
6311 			tpc_id);  in gaudi_run_tpc_kernel()
6336 			tpc_id);  in gaudi_run_tpc_kernel()
6356 			tpc_id);  in gaudi_run_tpc_kernel()