2551 	u32 qman_offset;  in gaudi_set_clock_gating()  local
2561 	for (i = GAUDI_PCI_DMA_1, qman_offset = 0 ; i < GAUDI_HBM_DMA_1 ; i++) {  in gaudi_set_clock_gating()
2565 		qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;  in gaudi_set_clock_gating()
2566 		WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset,  in gaudi_set_clock_gating()
2568 		WREG32(mmDMA0_QM_CGM_CFG + qman_offset,  in gaudi_set_clock_gating()
2576 		qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;  in gaudi_set_clock_gating()
2577 		WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset,  in gaudi_set_clock_gating()
2579 		WREG32(mmDMA0_QM_CGM_CFG + qman_offset,  in gaudi_set_clock_gating()
2591 	for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {  in gaudi_set_clock_gating()
2595 		WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset,  in gaudi_set_clock_gating()
2597 		WREG32(mmTPC0_QM_CGM_CFG + qman_offset,  in gaudi_set_clock_gating()
2600 		qman_offset += TPC_QMAN_OFFSET;  in gaudi_set_clock_gating()
2609 	u32 qman_offset;  in gaudi_disable_clock_gating()  local
2615 	for (i = 0, qman_offset = 0 ; i < DMA_NUMBER_OF_CHANNELS ; i++) {  in gaudi_disable_clock_gating()
2616 		WREG32(mmDMA0_QM_CGM_CFG + qman_offset, 0);  in gaudi_disable_clock_gating()
2617 		WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, 0);  in gaudi_disable_clock_gating()
2619 		qman_offset += (mmDMA1_QM_CGM_CFG - mmDMA0_QM_CGM_CFG);  in gaudi_disable_clock_gating()
2627 	for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {  in gaudi_disable_clock_gating()
2628 		WREG32(mmTPC0_QM_CGM_CFG + qman_offset, 0);  in gaudi_disable_clock_gating()
2629 		WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset, 0);  in gaudi_disable_clock_gating()
2631 		qman_offset += (mmTPC1_QM_CGM_CFG - mmTPC0_QM_CGM_CFG);  in gaudi_disable_clock_gating()
4470 	u32 qman_offset;  in gaudi_restore_qm_registers()  local
4474 		qman_offset = i * DMA_QMAN_OFFSET;  in gaudi_restore_qm_registers()
4475 		WREG32(mmDMA0_QM_ARB_CFG_0 + qman_offset, 0);  in gaudi_restore_qm_registers()
4479 		qman_offset = i * (mmMME2_QM_BASE - mmMME0_QM_BASE);  in gaudi_restore_qm_registers()
4480 		WREG32(mmMME0_QM_ARB_CFG_0 + qman_offset, 0);  in gaudi_restore_qm_registers()
4484 		qman_offset = i * TPC_QMAN_OFFSET;  in gaudi_restore_qm_registers()
4485 		WREG32(mmTPC0_QM_ARB_CFG_0 + qman_offset, 0);  in gaudi_restore_qm_registers()