1926 	u32 dma_offset = dma_id * DMA_CORE_OFFSET;  in gaudi_init_dma_core()  local
1930 	WREG32(mmDMA0_CORE_RD_MAX_OUTSTAND + dma_offset, 0);  in gaudi_init_dma_core()
1931 	WREG32(mmDMA0_CORE_RD_MAX_SIZE + dma_offset, 0);  in gaudi_init_dma_core()
1934 	WREG32(mmDMA0_CORE_LBW_MAX_OUTSTAND + dma_offset, 15);  in gaudi_init_dma_core()
1940 	WREG32(mmDMA0_CORE_ERR_CFG + dma_offset, dma_err_cfg);  in gaudi_init_dma_core()
1941 	WREG32(mmDMA0_CORE_ERRMSG_ADDR_LO + dma_offset,  in gaudi_init_dma_core()
1943 	WREG32(mmDMA0_CORE_ERRMSG_ADDR_HI + dma_offset,  in gaudi_init_dma_core()
1945 	WREG32(mmDMA0_CORE_ERRMSG_WDATA + dma_offset,  in gaudi_init_dma_core()
1947 	WREG32(mmDMA0_CORE_PROT + dma_offset,  in gaudi_init_dma_core()
1950 	WREG32(mmDMA0_CORE_SECURE_PROPS + dma_offset,  in gaudi_init_dma_core()
1952 	WREG32(mmDMA0_CORE_CFG_0 + dma_offset, 1 << DMA0_CORE_CFG_0_EN_SHIFT);  in gaudi_init_dma_core()
4451 		u32 dma_offset = i * DMA_CORE_OFFSET;  in gaudi_restore_dma_registers()  local
4453 		WREG32(mmDMA0_CORE_WR_COMP_ADDR_LO + dma_offset,  in gaudi_restore_dma_registers()
4455 		WREG32(mmDMA0_CORE_WR_COMP_ADDR_HI + dma_offset,  in gaudi_restore_dma_registers()
4457 		WREG32(mmDMA0_CORE_WR_COMP_WDATA + dma_offset, 0x80000001);  in gaudi_restore_dma_registers()
4463 			WREG32(mmDMA0_CORE_WR_AWUSER_31_11 + dma_offset,  in gaudi_restore_dma_registers()
4933 	u32 tmp, timeout, dma_offset;  in gaudi_send_job_on_qman0()  local
4968 	dma_offset = gaudi_dma_assignment[GAUDI_PCI_DMA_1] * DMA_CORE_OFFSET;  in gaudi_send_job_on_qman0()
4970 	WREG32_OR(mmDMA0_CORE_PROT + dma_offset, BIT(DMA0_CORE_PROT_VAL_SHIFT));  in gaudi_send_job_on_qman0()
4991 	WREG32_AND(mmDMA0_CORE_PROT + dma_offset,  in gaudi_send_job_on_qman0()
5018 	u32 dma_id[2], dma_offset, err_cause[2], mask, i;  in gaudi_get_razwi_initiator_dma_name()  local
5049 		dma_offset = dma_id[i] * DMA_CORE_OFFSET;  in gaudi_get_razwi_initiator_dma_name()
5050 		err_cause[i] = RREG32(mmDMA0_CORE_ERR_CAUSE + dma_offset);  in gaudi_get_razwi_initiator_dma_name()