467 	prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;  in gaudi_get_fixed_properties()
493 			(CFG_BASE - SPI_FLASH_BASE_ADDR);  in gaudi_pci_bars_map()
1847 	mtr_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1849 	mtr_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1851 	so_base_en_lo = lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1853 	so_base_en_hi = upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1855 	mtr_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1857 	mtr_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1859 	so_base_ws_lo = lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1861 	so_base_ws_hi = upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1901 			lower_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1904 			upper_32_bits(CFG_BASE +  in gaudi_init_pci_dma_qman()
1942 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR));  in gaudi_init_dma_core()
1944 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR));  in gaudi_init_dma_core()
2014 	mtr_base_lo = lower_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2016 	mtr_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2018 	so_base_lo = lower_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2020 	so_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2058 			lower_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2061 			upper_32_bits(CFG_BASE +  in gaudi_init_hbm_dma_qman()
2130 	mtr_base_lo = lower_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
2132 	mtr_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
2134 	so_base_lo = lower_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
2136 	so_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
2176 			lower_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
2179 			upper_32_bits(CFG_BASE +  in gaudi_init_mme_qman()
2250 	mtr_base_lo = lower_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
2252 	mtr_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
2254 	so_base_lo = lower_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
2256 	so_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
2297 			lower_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
2300 			upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qman()
2337 	so_base_hi = upper_32_bits(CFG_BASE +  in gaudi_init_tpc_qmans()
2640 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in gaudi_enable_timestamp()
2643 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);  in gaudi_enable_timestamp()
2644 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);  in gaudi_enable_timestamp()
2647 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);  in gaudi_enable_timestamp()
2653 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in gaudi_disable_timestamp()
4327 	cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_MSI_INTR_0 + msi_vec * 4);  in gaudi_add_end_of_cb_packets()
4448 		u64 sob_addr = CFG_BASE +  in gaudi_restore_dma_registers()
4543 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in gaudi_debugfs_read32()
4553 			*val = RREG32(addr - CFG_BASE);  in gaudi_debugfs_read32()
4590 	if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {  in gaudi_debugfs_write32()
4600 			WREG32(addr - CFG_BASE, val);  in gaudi_debugfs_write32()
4637 	if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {  in gaudi_debugfs_read64()
4647 			u32 val_l = RREG32(addr - CFG_BASE);  in gaudi_debugfs_read64()
4648 			u32 val_h = RREG32(addr + sizeof(u32) - CFG_BASE);  in gaudi_debugfs_read64()
4688 	if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {  in gaudi_debugfs_write64()
4698 			WREG32(addr - CFG_BASE, lower_32_bits(val));  in gaudi_debugfs_write64()
4699 			WREG32(addr + sizeof(u32) - CFG_BASE,  in gaudi_debugfs_write64()
5262 	if (params->block_address >= CFG_BASE)  in gaudi_extract_ecc_info()
5263 		params->block_address -= CFG_BASE;  in gaudi_extract_ecc_info()
6289 			lower_32_bits(CFG_BASE +  in gaudi_run_tpc_kernel()
6538 	fence_addr += CFG_BASE;  in gaudi_gen_wait_cb()