Lines Matching refs:vsec
29 #define CXL_READ_VSEC_LENGTH(dev, vsec, dest) \ argument
31 pci_read_config_word(dev, vsec + 0x6, dest); \
34 #define CXL_READ_VSEC_NAFUS(dev, vsec, dest) \ argument
35 pci_read_config_byte(dev, vsec + 0x8, dest)
37 #define CXL_READ_VSEC_STATUS(dev, vsec, dest) \ argument
38 pci_read_config_byte(dev, vsec + 0x9, dest)
50 #define CXL_READ_VSEC_MODE_CONTROL(dev, vsec, dest) \ argument
51 pci_read_config_byte(dev, vsec + 0xa, dest)
52 #define CXL_WRITE_VSEC_MODE_CONTROL(dev, vsec, val) \ argument
53 pci_write_config_byte(dev, vsec + 0xa, val)
60 #define CXL_READ_VSEC_PSL_REVISION(dev, vsec, dest) \ argument
61 pci_read_config_word(dev, vsec + 0xc, dest)
62 #define CXL_READ_VSEC_CAIA_MINOR(dev, vsec, dest) \ argument
63 pci_read_config_byte(dev, vsec + 0xe, dest)
64 #define CXL_READ_VSEC_CAIA_MAJOR(dev, vsec, dest) \ argument
65 pci_read_config_byte(dev, vsec + 0xf, dest)
66 #define CXL_READ_VSEC_BASE_IMAGE(dev, vsec, dest) \ argument
67 pci_read_config_word(dev, vsec + 0x10, dest)
69 #define CXL_READ_VSEC_IMAGE_STATE(dev, vsec, dest) \ argument
70 pci_read_config_byte(dev, vsec + 0x13, dest)
71 #define CXL_WRITE_VSEC_IMAGE_STATE(dev, vsec, val) \ argument
72 pci_write_config_byte(dev, vsec + 0x13, val)
77 #define CXL_READ_VSEC_AFU_DESC_OFF(dev, vsec, dest) \ argument
78 pci_read_config_dword(dev, vsec + 0x20, dest)
79 #define CXL_READ_VSEC_AFU_DESC_SIZE(dev, vsec, dest) \ argument
80 pci_read_config_dword(dev, vsec + 0x24, dest)
81 #define CXL_READ_VSEC_PS_OFF(dev, vsec, dest) \ argument
82 pci_read_config_dword(dev, vsec + 0x28, dest)
83 #define CXL_READ_VSEC_PS_SIZE(dev, vsec, dest) \ argument
84 pci_read_config_dword(dev, vsec + 0x2c, dest)
153 int vsec = 0; in find_cxl_vsec() local
156 while ((vsec = pci_find_next_ext_capability(dev, vsec, PCI_EXT_CAP_ID_VNDR))) { in find_cxl_vsec()
157 pci_read_config_word(dev, vsec + 0x4, &val); in find_cxl_vsec()
159 return vsec; in find_cxl_vsec()
167 int vsec; in dump_cxl_config_space() local
192 if (!(vsec = find_cxl_vsec(dev))) in dump_cxl_config_space()
198 pci_read_config_dword(dev, vsec + 0x0, &val); in dump_cxl_config_space()
202 pci_read_config_dword(dev, vsec + 0x4, &val); in dump_cxl_config_space()
206 pci_read_config_dword(dev, vsec + 0x8, &val); in dump_cxl_config_space()
211 pci_read_config_dword(dev, vsec + 0xc, &val); in dump_cxl_config_space()
214 pci_read_config_dword(dev, vsec + 0x10, &val); in dump_cxl_config_space()
221 pci_read_config_dword(dev, vsec + 0x14, &val); in dump_cxl_config_space()
223 pci_read_config_dword(dev, vsec + 0x18, &val); in dump_cxl_config_space()
225 pci_read_config_dword(dev, vsec + 0x1c, &val); in dump_cxl_config_space()
228 pci_read_config_dword(dev, vsec + 0x20, &val); in dump_cxl_config_space()
230 pci_read_config_dword(dev, vsec + 0x24, &val); in dump_cxl_config_space()
232 pci_read_config_dword(dev, vsec + 0x28, &val); in dump_cxl_config_space()
234 pci_read_config_dword(dev, vsec + 0x2c, &val); in dump_cxl_config_space()
237 pci_read_config_dword(dev, vsec + 0x30, &val); in dump_cxl_config_space()
239 pci_read_config_dword(dev, vsec + 0x34, &val); in dump_cxl_config_space()
241 pci_read_config_dword(dev, vsec + 0x38, &val); in dump_cxl_config_space()
243 pci_read_config_dword(dev, vsec + 0x3c, &val); in dump_cxl_config_space()
246 pci_read_config_dword(dev, vsec + 0x40, &val); in dump_cxl_config_space()
248 pci_read_config_dword(dev, vsec + 0x44, &val); in dump_cxl_config_space()
251 pci_read_config_dword(dev, vsec + 0x48, &val); in dump_cxl_config_space()
253 pci_read_config_dword(dev, vsec + 0x4c, &val); in dump_cxl_config_space()
256 pci_read_config_dword(dev, vsec + 0x50, &val); in dump_cxl_config_space()
258 pci_read_config_dword(dev, vsec + 0x54, &val); in dump_cxl_config_space()
260 pci_read_config_dword(dev, vsec + 0x58, &val); in dump_cxl_config_space()
262 pci_read_config_dword(dev, vsec + 0x58, &val); in dump_cxl_config_space()
667 int vsec; in cxl_update_image_control() local
670 if (!(vsec = find_cxl_vsec(dev))) { in cxl_update_image_control()
675 if ((rc = CXL_READ_VSEC_IMAGE_STATE(dev, vsec, &image_state))) { in cxl_update_image_control()
690 if ((rc = CXL_WRITE_VSEC_IMAGE_STATE(dev, vsec, image_state))) { in cxl_update_image_control()
751 int vsec; in switch_card_to_cxl() local
757 if (!(vsec = find_cxl_vsec(dev))) { in switch_card_to_cxl()
762 if ((rc = CXL_READ_VSEC_MODE_CONTROL(dev, vsec, &val))) { in switch_card_to_cxl()
768 if ((rc = CXL_WRITE_VSEC_MODE_CONTROL(dev, vsec, val))) { in switch_card_to_cxl()
1289 int vsec; in cxl_read_vsec() local
1295 if (!(vsec = find_cxl_vsec(dev))) { in cxl_read_vsec()
1300 CXL_READ_VSEC_LENGTH(dev, vsec, &vseclen); in cxl_read_vsec()
1306 CXL_READ_VSEC_STATUS(dev, vsec, &adapter->vsec_status); in cxl_read_vsec()
1307 CXL_READ_VSEC_PSL_REVISION(dev, vsec, &adapter->psl_rev); in cxl_read_vsec()
1308 CXL_READ_VSEC_CAIA_MAJOR(dev, vsec, &adapter->caia_major); in cxl_read_vsec()
1309 CXL_READ_VSEC_CAIA_MINOR(dev, vsec, &adapter->caia_minor); in cxl_read_vsec()
1310 CXL_READ_VSEC_BASE_IMAGE(dev, vsec, &adapter->base_image); in cxl_read_vsec()
1311 CXL_READ_VSEC_IMAGE_STATE(dev, vsec, &image_state); in cxl_read_vsec()
1316 CXL_READ_VSEC_NAFUS(dev, vsec, &adapter->slices); in cxl_read_vsec()
1317 CXL_READ_VSEC_AFU_DESC_OFF(dev, vsec, &afu_desc_off); in cxl_read_vsec()
1318 CXL_READ_VSEC_AFU_DESC_SIZE(dev, vsec, &afu_desc_size); in cxl_read_vsec()
1319 CXL_READ_VSEC_PS_OFF(dev, vsec, &ps_off); in cxl_read_vsec()
1320 CXL_READ_VSEC_PS_SIZE(dev, vsec, &ps_size); in cxl_read_vsec()