Lines Matching refs:pcr_dbg
67 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); in rtsx5261_fetch_vendor_settings()
70 pcr_dbg(pcr, "skip fetch vendor setting\n"); in rtsx5261_fetch_vendor_settings()
82 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); in rtsx5261_fetch_vendor_settings()
389 pcr_dbg(pcr, "Load efuse valid: 0x%x\n", efuse_valid); in rts5261_init_from_hw()
394 pcr_dbg(pcr, "read 0x814 DW fail\n"); in rts5261_init_from_hw()
395 pcr_dbg(pcr, "DW from 0x814: 0x%x\n", lval); in rts5261_init_from_hw()
398 pcr_dbg(pcr, "0x816: %d\n", valid); in rts5261_init_from_hw()
402 pcr_dbg(pcr, "Disable efuse por!\n"); in rts5261_init_from_hw()
408 pcr_dbg(pcr, "write config fail\n"); in rts5261_init_from_hw()
637 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rts5261_pci_switch_clock()
642 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rts5261_pci_switch_clock()
673 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rts5261_pci_switch_clock()
699 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rts5261_pci_switch_clock()