Lines Matching refs:tim3
493 u32 tim3 = 0, val = 0, t_dqsck; in get_sdram_tim_3_shdw() local
497 tim3 |= val << T_RAS_MAX_SHIFT; in get_sdram_tim_3_shdw()
500 tim3 |= val << T_RFC_SHIFT; in get_sdram_tim_3_shdw()
509 tim3 |= val << T_TDQSCKMAX_SHIFT; in get_sdram_tim_3_shdw()
512 tim3 |= val << ZQ_ZQCS_SHIFT; in get_sdram_tim_3_shdw()
516 tim3 |= val << T_CKESR_SHIFT; in get_sdram_tim_3_shdw()
519 tim3 |= (EMIF_T_CSTA - 1) << T_CSTA_SHIFT; in get_sdram_tim_3_shdw()
522 tim3 |= val << T_PDLL_UL_SHIFT; in get_sdram_tim_3_shdw()
525 return tim3; in get_sdram_tim_3_shdw()
880 u32 tim1, tim3, ref_ctrl, type; in setup_temperature_sensitive_regs() local
887 tim3 = regs->sdram_tim3_shdw; in setup_temperature_sensitive_regs()
899 tim3 = regs->sdram_tim3_shdw_derated; in setup_temperature_sensitive_regs()
905 writel(tim3, base + EMIF_SDRAM_TIMING_3_SHDW); in setup_temperature_sensitive_regs()