83 	u32 ip_rev = emif->plat_data->ip_rev;  in do_emif_regdump_show()  local
93 	if (ip_rev == EMIF_4D) {  in do_emif_regdump_show()
98 	} else if (ip_rev == EMIF_4D5) {  in do_emif_regdump_show()
243 	if ((emif->plat_data->ip_rev == EMIF_4D) &&  in set_lpmode()
491 		u32 type, u32 ip_rev, u32 derated)  in get_sdram_tim_3_shdw()  argument
504 	if (ip_rev == EMIF_4D5)  in get_sdram_tim_3_shdw()
518 	if (ip_rev == EMIF_4D5) {  in get_sdram_tim_3_shdw()
703 static u32 get_pwr_mgmt_ctrl(u32 freq, struct emif_data *emif, u32 ip_rev)  in get_pwr_mgmt_ctrl()  argument
780 	if (ip_rev == EMIF_4D5)  in get_pwr_mgmt_ctrl()
838 	if (emif->plat_data->ip_rev != EMIF_4D5)  in setup_registers()
1107 			emif->plat_data->ip_rev);  in emif_onetime_settings()
1167 		u32 ip_rev, struct device *dev)  in is_dev_data_valid()  argument
1179 	switch (ip_rev) {  in is_dev_data_valid()
1328 		emif->plat_data->ip_rev = EMIF_4D;  in of_get_memory_device_details()
1330 		emif->plat_data->ip_rev = EMIF_4D5;  in of_get_memory_device_details()
1339 			pd->device_info->io_width, pd->phy_type, pd->ip_rev,  in of_get_memory_device_details()
1397 			pd->phy_type, pd->ip_rev, dev))) {  in get_device_details()
1572 	u32				ip_rev, phy_type;  in get_emif_reg_values()  local
1597 	ip_rev		= emif_for_calc->plat_data->ip_rev;  in get_emif_reg_values()
1610 		addressing, type, ip_rev, EMIF_NORMAL_TIMINGS);  in get_emif_reg_values()
1614 	if (phy_type == EMIF_PHY_TYPE_ATTILAPHY && ip_rev == EMIF_4D) {  in get_emif_reg_values()
1617 	} else if (phy_type == EMIF_PHY_TYPE_INTELLIPHY && ip_rev == EMIF_4D5) {  in get_emif_reg_values()
1628 		get_pwr_mgmt_ctrl(freq, emif_for_calc, ip_rev) &  in get_emif_reg_values()
1631 	if (ip_rev & EMIF_4D) {  in get_emif_reg_values()
1637 	} else if (ip_rev & EMIF_4D5) {  in get_emif_reg_values()
1654 			min_tck, addressing, type, ip_rev,  in get_emif_reg_values()