Lines Matching refs:saa7146_write
1181 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */ in stop_ts_capture()
1200 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ in start_ts_capture()
2376 saa7146_write(dev, MC1, MASK_31); in av7110_attach()
2382 saa7146_write(dev, DD1_STREAM_B, 0); in av7110_attach()
2384 saa7146_write(dev, DD1_INIT, 0x00000200); in av7110_attach()
2385 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI in av7110_attach()
2386 saa7146_write(dev, MC2, in av7110_attach()
2398 saa7146_write(dev, MC1, MASK_29); in av7110_attach()
2400 saa7146_write(dev, RPS_TOV1, 0); in av7110_attach()
2419 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); in av7110_attach()
2421 saa7146_write(dev, ECT1R, 0x3fff ); in av7110_attach()
2424 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); in av7110_attach()
2426 saa7146_write(dev, MC1, (MASK_13 | MASK_29 )); in av7110_attach()
2440 saa7146_write(dev, MC1, ( MASK_29 )); in av7110_attach()
2468 saa7146_write(dev, GPIO_CTRL, 0x500000); in av7110_attach()
2502 saa7146_write(dev, DD1_STREAM_B, 0x00000000); in av7110_attach()
2503 saa7146_write(dev, MC2, (MASK_10 | MASK_26)); in av7110_attach()
2505 saa7146_write(dev, DD1_INIT, 0x00000600); in av7110_attach()
2506 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); in av7110_attach()
2508 saa7146_write(dev, BRS_CTRL, 0x60000000); in av7110_attach()
2509 saa7146_write(dev, MC2, MASK_08 | MASK_24); in av7110_attach()
2512 saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000)); in av7110_attach()
2513 saa7146_write(dev, BASE_ODD3, 0); in av7110_attach()
2514 saa7146_write(dev, BASE_EVEN3, 0); in av7110_attach()
2515 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT); in av7110_attach()
2516 saa7146_write(dev, PITCH3, TS_WIDTH); in av7110_attach()
2517 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90); in av7110_attach()
2518 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH); in av7110_attach()
2519 saa7146_write(dev, MC2, MASK_04 | MASK_20); in av7110_attach()
2530 saa7146_write(dev, PCI_BT_V1, 0x1c1f101f); in av7110_attach()
2531 saa7146_write(dev, BCS_CTRL, 0x80400040); in av7110_attach()
2533 saa7146_write(dev, DD1_STREAM_B, 0x00000000); in av7110_attach()
2534 saa7146_write(dev, DD1_INIT, 0x03000200); in av7110_attach()
2535 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); in av7110_attach()
2536 saa7146_write(dev, BRS_CTRL, 0x60000000); in av7110_attach()
2537 saa7146_write(dev, BASE_ODD3, 0); in av7110_attach()
2538 saa7146_write(dev, BASE_EVEN3, 0); in av7110_attach()
2539 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT); in av7110_attach()
2540 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90); in av7110_attach()
2542 saa7146_write(dev, PITCH3, TS_WIDTH); in av7110_attach()
2543 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH); in av7110_attach()
2546 saa7146_write(dev, MC2, 0x077c077c); in av7110_attach()
2547 saa7146_write(dev, GPIO_CTRL, 0x000000); in av7110_attach()
2553 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); in av7110_attach()
2555 saa7146_write(dev, ECT1R, 0x3fff ); in av7110_attach()
2587 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); in av7110_attach()
2596 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 ); in av7110_attach()
2599 saa7146_write(dev, MC1, (MASK_13 | MASK_29)); in av7110_attach()
2604 saa7146_write(dev, PCI_BT_V1, 0x1c00101f); in av7110_attach()
2605 saa7146_write(dev, BCS_CTRL, 0x80400040); in av7110_attach()
2608 saa7146_write(dev, DD1_STREAM_B, 0x00000000); in av7110_attach()
2609 saa7146_write(dev, DD1_INIT, 0x03000000); in av7110_attach()
2610 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); in av7110_attach()
2613 saa7146_write(dev, MC2, 0x077c077c); in av7110_attach()
2614 saa7146_write(dev, GPIO_CTRL, 0x000000); in av7110_attach()
2755 saa7146_write(saa, MC1, MASK_29); in av7110_detach()
2759 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */ in av7110_detach()