Lines Matching +full:0 +full:x61
71 } while (0)
84 sizes[0] = dev->ts_packet_size * dev->ts_packet_count; in queue_setup()
86 return 0; in queue_setup()
107 memset(risc, 0, sizeof(*risc)); in buffer_finish()
127 return 0; in start_streaming()
166 int ret = 0; in cx88_dvb_bus_ctrl()
183 dev->frontends.active_fe_id = 0; in cx88_dvb_bus_ctrl()
217 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x39 }; in dvico_fusionhdtv_demod_init()
218 static const u8 reset[] = { RESET, 0x80 }; in dvico_fusionhdtv_demod_init()
219 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; in dvico_fusionhdtv_demod_init()
220 static const u8 agc_cfg[] = { AGC_TARGET, 0x24, 0x20 }; in dvico_fusionhdtv_demod_init()
221 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 }; in dvico_fusionhdtv_demod_init()
222 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; in dvico_fusionhdtv_demod_init()
232 return 0; in dvico_fusionhdtv_demod_init()
237 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x38 }; in dvico_dual_demod_init()
238 static const u8 reset[] = { RESET, 0x80 }; in dvico_dual_demod_init()
239 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; in dvico_dual_demod_init()
240 static const u8 agc_cfg[] = { AGC_TARGET, 0x28, 0x20 }; in dvico_dual_demod_init()
241 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 }; in dvico_dual_demod_init()
242 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; in dvico_dual_demod_init()
253 return 0; in dvico_dual_demod_init()
258 static const u8 clock_config[] = { 0x89, 0x38, 0x39 }; in dntv_live_dvbt_demod_init()
259 static const u8 reset[] = { 0x50, 0x80 }; in dntv_live_dvbt_demod_init()
260 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 }; in dntv_live_dvbt_demod_init()
261 static const u8 agc_cfg[] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, in dntv_live_dvbt_demod_init()
262 0x00, 0xFF, 0x00, 0x40, 0x40 }; in dntv_live_dvbt_demod_init()
263 static const u8 dntv_extra[] = { 0xB5, 0x7A }; in dntv_live_dvbt_demod_init()
264 static const u8 capt_range_cfg[] = { 0x75, 0x32 }; in dntv_live_dvbt_demod_init()
276 return 0; in dntv_live_dvbt_demod_init()
280 .demod_address = 0x0f,
285 .demod_address = 0x0f,
290 .demod_address = 0x0f,
295 .demod_address = (0x1e >> 1),
301 .demod_address = 0x08,
307 static const u8 clock_config[] = { 0x89, 0x38, 0x38 }; in dntv_live_dvbt_pro_demod_init()
308 static const u8 reset[] = { 0x50, 0x80 }; in dntv_live_dvbt_pro_demod_init()
309 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 }; in dntv_live_dvbt_pro_demod_init()
310 static const u8 agc_cfg[] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF, in dntv_live_dvbt_pro_demod_init()
311 0x00, 0xFF, 0x00, 0x40, 0x40 }; in dntv_live_dvbt_pro_demod_init()
312 static const u8 dntv_extra[] = { 0xB5, 0x7A }; in dntv_live_dvbt_pro_demod_init()
313 static const u8 capt_range_cfg[] = { 0x75, 0x32 }; in dntv_live_dvbt_pro_demod_init()
325 return 0; in dntv_live_dvbt_pro_demod_init()
329 .demod_address = 0x0f,
336 .demod_address = 0x0f,
341 .demod_address = 0x0f,
347 .demod_address = 0x0f,
354 .demod_address = 0x0f,
358 .demod_address = 0x43,
363 .demod_address = 0x63,
371 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; in or51132_set_ts_param()
372 return 0; in or51132_set_ts_param()
376 .demod_address = 0x15,
386 if (index == 0) in lgdt330x_pll_rf_set()
390 return 0; in lgdt330x_pll_rf_set()
398 dev->ts_gen_cntrl |= 0x04; in lgdt330x_set_ts_param()
400 dev->ts_gen_cntrl &= ~0x04; in lgdt330x_set_ts_param()
401 return 0; in lgdt330x_set_ts_param()
406 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
412 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
418 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
426 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; in nxt200x_set_ts_param()
427 return 0; in nxt200x_set_ts_param()
431 .demod_address = 0x0a,
440 dev->ts_gen_cntrl = 0x02; in cx24123_set_ts_param()
441 return 0; in cx24123_set_ts_param()
451 cx_write(MO_GP0_IO, 0x000006fb); in kworld_dvbs_100_set_voltage()
453 cx_write(MO_GP0_IO, 0x000006f9); in kworld_dvbs_100_set_voltage()
457 return 0; in kworld_dvbs_100_set_voltage()
468 cx_write(MO_GP0_IO, 0x0000efff); in geniatech_dvbs_set_voltage()
473 return 0; in geniatech_dvbs_set_voltage()
482 cx_set(MO_GP0_IO, 0x6040); in tevii_dvbs_set_voltage()
485 cx_clear(MO_GP0_IO, 0x20); in tevii_dvbs_set_voltage()
488 cx_set(MO_GP0_IO, 0x20); in tevii_dvbs_set_voltage()
491 cx_clear(MO_GP0_IO, 0x20); in tevii_dvbs_set_voltage()
497 return 0; in tevii_dvbs_set_voltage()
509 cx_write(MO_GP0_IO, 0x00001220); in vp1027_set_voltage()
513 cx_write(MO_GP0_IO, 0x00001222); in vp1027_set_voltage()
517 cx_write(MO_GP0_IO, 0x00001230); in vp1027_set_voltage()
523 return 0; in vp1027_set_voltage()
527 .demod_address = 0x55,
532 .demod_address = 0x55,
537 .demod_address = 0x15,
543 .demod_address = 0x32 >> 1,
553 .demod_address = 0x32 >> 1,
562 .demod_address = 0x32 >> 1,
571 .i2c_address = 0x64,
576 .demod_address = (0x1e >> 1),
582 .demod_address = (0x1e >> 1),
598 .i2c_address = 0xc2 >> 1,
641 return 0; in attach_xc3028()
671 return 0; in attach_xc4000()
679 dev->ts_gen_cntrl = 0x2; in cx24116_set_ts_param()
681 return 0; in cx24116_set_ts_param()
689 dev->ts_gen_cntrl = 0; in stv0900_set_ts_param()
691 return 0; in stv0900_set_ts_param()
701 cx_write(MO_SRST_IO, 0); in cx24116_reset_device()
707 return 0; in cx24116_reset_device()
711 .demod_address = 0x05,
717 .demod_address = 0x55,
729 return 0; in ds3000_set_ts_param()
733 .demod_address = 0x68,
738 .tuner_address = 0x60,
743 .demod_address = 0x6a,
744 /* demod_mode = 0,*/
746 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
748 .tun1_maddress = 0,/* 0x60 */
749 .tun1_adc = 0,/* 2 Vpp */
755 .tuner_address = 0x60,
760 .demod_address = 0x68,
764 .skip_reinit = 0,
773 .demod_address = 0x68,
800 return 0; in cx8802_alloc_frontends()
804 0x01, 0x15,
805 0x02, 0x00,
806 0x03, 0x00,
807 0x04, 0x7D,
808 0x05, 0x0F,
809 0x06, 0x02,
810 0x07, 0x00,
811 0x08, 0x60,
813 0x0A, 0xC2,
814 0x0B, 0x00,
815 0x0C, 0x01,
816 0x0D, 0x81,
817 0x0E, 0x44,
818 0x0F, 0x09,
819 0x10, 0x3C,
820 0x11, 0x84,
821 0x12, 0xDA,
822 0x13, 0x99,
823 0x14, 0x8D,
824 0x15, 0xCE,
825 0x16, 0xE8,
826 0x17, 0x43,
827 0x18, 0x1C,
828 0x19, 0x1B,
829 0x1A, 0x1D,
831 0x1C, 0x12,
832 0x1D, 0x00,
833 0x1E, 0x00,
834 0x1F, 0x00,
835 0x20, 0x00,
836 0x21, 0x00,
837 0x22, 0x00,
838 0x23, 0x00,
840 0x28, 0x02,
841 0x29, 0x28,
842 0x2A, 0x14,
843 0x2B, 0x0F,
844 0x2C, 0x09,
845 0x2D, 0x05,
847 0x31, 0x1F,
848 0x32, 0x19,
849 0x33, 0xFC,
850 0x34, 0x13,
851 0xff, 0xff,
861 .addr = 0x61, in samsung_smt_7020_tuner_set_params()
862 .flags = 0, in samsung_smt_7020_tuner_set_params()
868 buf[0] = (div >> 8) & 0x7f; in samsung_smt_7020_tuner_set_params()
869 buf[1] = div & 0xff; in samsung_smt_7020_tuner_set_params()
870 buf[2] = 0x84; /* 0xC4 */ in samsung_smt_7020_tuner_set_params()
871 buf[3] = 0x00; in samsung_smt_7020_tuner_set_params()
874 buf[3] |= 0x10; in samsung_smt_7020_tuner_set_params()
882 return 0; in samsung_smt_7020_tuner_set_params()
891 cx_set(MO_GP0_IO, 0x0800); in samsung_smt_7020_set_tone()
895 cx_set(MO_GP0_IO, 0x08); in samsung_smt_7020_set_tone()
898 cx_clear(MO_GP0_IO, 0x08); in samsung_smt_7020_set_tone()
904 return 0; in samsung_smt_7020_set_tone()
916 .flags = 0, in samsung_smt_7020_set_voltage()
920 cx_set(MO_GP0_IO, 0x8000); in samsung_smt_7020_set_voltage()
927 cx_clear(MO_GP0_IO, 0x80); in samsung_smt_7020_set_voltage()
931 cx_clear(MO_GP0_IO, 0x80); in samsung_smt_7020_set_voltage()
937 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO; in samsung_smt_7020_set_voltage()
943 u8 aclk = 0; in samsung_smt_7020_stv0299_set_symbol_rate()
944 u8 bclk = 0; in samsung_smt_7020_stv0299_set_symbol_rate()
947 aclk = 0xb7; in samsung_smt_7020_stv0299_set_symbol_rate()
948 bclk = 0x47; in samsung_smt_7020_stv0299_set_symbol_rate()
950 aclk = 0xb7; in samsung_smt_7020_stv0299_set_symbol_rate()
951 bclk = 0x4b; in samsung_smt_7020_stv0299_set_symbol_rate()
953 aclk = 0xb7; in samsung_smt_7020_stv0299_set_symbol_rate()
954 bclk = 0x4f; in samsung_smt_7020_stv0299_set_symbol_rate()
956 aclk = 0xb7; in samsung_smt_7020_stv0299_set_symbol_rate()
957 bclk = 0x53; in samsung_smt_7020_stv0299_set_symbol_rate()
959 aclk = 0xb6; in samsung_smt_7020_stv0299_set_symbol_rate()
960 bclk = 0x53; in samsung_smt_7020_stv0299_set_symbol_rate()
962 aclk = 0xb4; in samsung_smt_7020_stv0299_set_symbol_rate()
963 bclk = 0x51; in samsung_smt_7020_stv0299_set_symbol_rate()
966 stv0299_writereg(fe, 0x13, aclk); in samsung_smt_7020_stv0299_set_symbol_rate()
967 stv0299_writereg(fe, 0x14, bclk); in samsung_smt_7020_stv0299_set_symbol_rate()
968 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff); in samsung_smt_7020_stv0299_set_symbol_rate()
969 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff); in samsung_smt_7020_stv0299_set_symbol_rate()
970 stv0299_writereg(fe, 0x21, ratio & 0xf0); in samsung_smt_7020_stv0299_set_symbol_rate()
972 return 0; in samsung_smt_7020_stv0299_set_symbol_rate()
976 .demod_address = 0x68,
979 .invert = 0,
980 .skip_reinit = 0,
991 int mfe_shared = 0; /* bus not shared by default */ in dvb_register()
994 if (core->i2c_rc != 0) { in dvb_register()
1005 dev->frontends.gate = 0; in dvb_register()
1018 0x61, &core->i2c_adap, in dvb_register()
1032 0x60, &core->i2c_adap, in dvb_register()
1046 &core->i2c_adap, 0x61, in dvb_register()
1057 &core->i2c_adap, 0x61, in dvb_register()
1074 0x08, ISL6421_DCL, 0x00, false)) in dvb_register()
1090 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) in dvb_register()
1100 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) in dvb_register()
1110 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) in dvb_register()
1124 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) in dvb_register()
1134 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) in dvb_register()
1144 0x61, NULL, DVB_PLL_LG_Z201)) in dvb_register()
1156 0x61, NULL, DVB_PLL_UNKNOWN_1)) in dvb_register()
1168 &core->i2c_adap, 0x61, in dvb_register()
1182 &core->i2c_adap, 0x61, in dvb_register()
1202 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1210 &core->i2c_adap, 0x61, in dvb_register()
1216 dev->ts_gen_cntrl = 0x08; in dvb_register()
1228 0x0e, in dvb_register()
1232 &core->i2c_adap, 0x61, in dvb_register()
1238 dev->ts_gen_cntrl = 0x08; in dvb_register()
1247 0x0e, in dvb_register()
1251 &core->i2c_adap, 0x61, in dvb_register()
1257 dev->ts_gen_cntrl = 0x08; in dvb_register()
1266 0x0e, in dvb_register()
1270 &core->i2c_adap, 0x61, in dvb_register()
1274 &core->i2c_adap, 0x43)) in dvb_register()
1279 dev->ts_gen_cntrl = 0x08; in dvb_register()
1288 0x59, in dvb_register()
1292 &core->i2c_adap, 0x61, in dvb_register()
1296 &core->i2c_adap, 0x43)) in dvb_register()
1306 &core->i2c_adap, 0x61, in dvb_register()
1325 &core->i2c_adap, 0x08, ISL6421_DCL, in dvb_register()
1326 0x00, override_tone)) in dvb_register()
1367 .i2c_addr = 0x61, in dvb_register()
1389 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1400 .i2c_address = 0x61, in dvb_register()
1401 .default_pm = 0, in dvb_register()
1407 if (attach_xc4000(dev, &cfg) < 0) in dvb_register()
1412 dev->ts_gen_cntrl = 0x00; in dvb_register()
1417 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1424 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1450 0x08, ISL6421_DCL, 0x00, false)) in dvb_register()
1466 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) in dvb_register()
1478 0x08, ISL6421_DCL, 0x00, false)) in dvb_register()
1489 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, in dvb_register()
1501 fe0->dvb.frontend, 0x61, in dvb_register()
1543 if (attach_xc3028(0x61, dev) < 0) in dvb_register()
1552 &core->i2c_adap, 0); in dvb_register()
1573 dev->ts_gen_cntrl = 0x08; in dvb_register()
1575 cx_set(MO_GP0_IO, 0x0101); in dvb_register()
1577 cx_clear(MO_GP0_IO, 0x01); in dvb_register()
1579 cx_set(MO_GP0_IO, 0x01); in dvb_register()
1598 dev->ts_gen_cntrl = 0x00; in dvb_register()
1650 int err = 0; in cx8802_dvb_advise_acquire()
1661 cx_set(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1663 cx_clear(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1665 cx_set(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1668 cx_clear(MO_GP0_IO, 0x00000004); in cx8802_dvb_advise_acquire()
1675 cx_set(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1677 cx_clear(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1679 cx_set(MO_GP0_IO, 0x00000080); in cx8802_dvb_advise_acquire()
1684 cx_set(MO_GP0_IO, 0x00000004); in cx8802_dvb_advise_acquire()
1687 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */ in cx8802_dvb_advise_acquire()
1691 cx_write(MO_SRST_IO, 0); in cx8802_dvb_advise_acquire()
1693 cx_clear(MO_GP0_IO, 0x00000004); in cx8802_dvb_advise_acquire()
1694 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */ in cx8802_dvb_advise_acquire()
1702 cx_write(MO_GP2_IO, 0x0101); in cx8802_dvb_advise_acquire()
1715 int err = 0; in cx8802_dvb_advise_release()
1751 /* If vp3054 isn't enabled, a stub will just return 0 */ in cx8802_dvb_probe()
1753 if (err != 0) in cx8802_dvb_probe()
1758 dev->ts_gen_cntrl = 0x0c; in cx8802_dvb_probe()
1788 if (err < 0) in cx8802_dvb_probe()
1819 return 0; in cx8802_dvb_remove()