Lines Matching refs:rk628

60 static unsigned long rk628_cru_clk_get_rate_pll(struct rk628 *rk628,  in rk628_cru_clk_get_rate_pll()  argument
69 rk628_i2c_read(rk628, CRU_MODE_CON00, &val); in rk628_cru_clk_get_rate_pll()
86 rk628_i2c_read(rk628, offset + CRU_CPLL_CON0, &con0); in rk628_cru_clk_get_rate_pll()
87 rk628_i2c_read(rk628, offset + CRU_CPLL_CON1, &con1); in rk628_cru_clk_get_rate_pll()
88 rk628_i2c_read(rk628, offset + CRU_CPLL_CON2, &con2); in rk628_cru_clk_get_rate_pll()
118 static unsigned long rk628_cru_clk_set_rate_pll(struct rk628 *rk628, in rk628_cru_clk_set_rate_pll() argument
148 rk628_i2c_write(rk628, offset + CRU_CPLL_CON0, PLL_BYPASS(1)); in rk628_cru_clk_set_rate_pll()
149 rk628_i2c_write(rk628, offset + CRU_CPLL_CON1, PLL_PD(0)); in rk628_cru_clk_set_rate_pll()
151 rk628_i2c_read(rk628, offset + CRU_CPLL_CON1, &val); in rk628_cru_clk_set_rate_pll()
245 rk628_i2c_write(rk628, offset + CRU_CPLL_CON0, in rk628_cru_clk_set_rate_pll()
248 rk628_i2c_write(rk628, offset + CRU_CPLL_CON1, in rk628_cru_clk_set_rate_pll()
251 rk628_i2c_write(rk628, offset + CRU_CPLL_CON2, PLL_FRAC(frac)); in rk628_cru_clk_set_rate_pll()
254 rk628_i2c_read(rk628, offset + CRU_CPLL_CON1, &val); in rk628_cru_clk_set_rate_pll()
262 static unsigned long rk628_cru_clk_set_rate_sclk_vop(struct rk628 *rk628, in rk628_cru_clk_set_rate_sclk_vop() argument
268 rk628_i2c_read(rk628, CRU_CLKSEL_CON02, &val); in rk628_cru_clk_set_rate_sclk_vop()
272 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_GPLL); in rk628_cru_clk_set_rate_sclk_vop()
274 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_CPLL); in rk628_cru_clk_set_rate_sclk_vop()
279 rk628_i2c_write(rk628, CRU_CLKSEL_CON13, m << 16 | n); in rk628_cru_clk_set_rate_sclk_vop()
284 static unsigned long rk628_cru_clk_set_rate_sclk_hdmirx_aud(struct rk628 *rk628, in rk628_cru_clk_set_rate_sclk_hdmirx_aud() argument
290 parent_rate = rk628_cru_clk_set_rate_pll(rk628, CGU_CLK_GPLL, rate*4); in rk628_cru_clk_set_rate_sclk_hdmirx_aud()
294 rk628_i2c_write(rk628, CRU_CLKSEL_CON05, 0x3fc0 << 16 | ((div - 1) << 6) | in rk628_cru_clk_set_rate_sclk_hdmirx_aud()
299 static unsigned long rk628_cru_clk_get_rate_sclk_hdmirx_aud(struct rk628 *rk628) in rk628_cru_clk_get_rate_sclk_hdmirx_aud() argument
306 rk628_i2c_read(rk628, CRU_CLKSEL_CON05, &val); in rk628_cru_clk_get_rate_sclk_hdmirx_aud()
308 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_GPLL); in rk628_cru_clk_get_rate_sclk_hdmirx_aud()
310 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_CPLL); in rk628_cru_clk_get_rate_sclk_hdmirx_aud()
317 static unsigned long rk628_cru_clk_get_rate_sclk_vop(struct rk628 *rk628) in rk628_cru_clk_get_rate_sclk_vop() argument
322 rk628_i2c_read(rk628, CRU_CLKSEL_CON02, &mux); in rk628_cru_clk_get_rate_sclk_vop()
326 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_GPLL); in rk628_cru_clk_get_rate_sclk_vop()
328 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_CPLL); in rk628_cru_clk_get_rate_sclk_vop()
330 rk628_i2c_read(rk628, CRU_CLKSEL_CON13, &div); in rk628_cru_clk_get_rate_sclk_vop()
338 static unsigned long rk628_cru_clk_set_rate_rx_read(struct rk628 *rk628, in rk628_cru_clk_set_rate_rx_read() argument
344 rk628_i2c_read(rk628, CRU_CLKSEL_CON02, &val); in rk628_cru_clk_set_rate_rx_read()
348 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_GPLL); in rk628_cru_clk_set_rate_rx_read()
350 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_CPLL); in rk628_cru_clk_set_rate_rx_read()
355 rk628_i2c_write(rk628, CRU_CLKSEL_CON14, m << 16 | n); in rk628_cru_clk_set_rate_rx_read()
360 static unsigned long rk628_cru_clk_get_rate_uart_src(struct rk628 *rk628) in rk628_cru_clk_get_rate_uart_src() argument
365 rk628_i2c_read(rk628, CRU_CLKSEL_CON21, &mux); in rk628_cru_clk_get_rate_uart_src()
368 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_GPLL); in rk628_cru_clk_get_rate_uart_src()
370 parent_rate = rk628_cru_clk_get_rate_pll(rk628, CGU_CLK_CPLL); in rk628_cru_clk_get_rate_uart_src()
372 rk628_i2c_read(rk628, CRU_CLKSEL_CON21, &div); in rk628_cru_clk_get_rate_uart_src()
380 static unsigned long rk628_cru_clk_set_rate_sclk_uart(struct rk628 *rk628, in rk628_cru_clk_set_rate_sclk_uart() argument
385 parent_rate = rk628_cru_clk_get_rate_uart_src(rk628); in rk628_cru_clk_set_rate_sclk_uart()
388 rk628_i2c_write(rk628, CRU_CLKSEL_CON06, in rk628_cru_clk_set_rate_sclk_uart()
392 rk628_i2c_write(rk628, CRU_CLKSEL_CON06, in rk628_cru_clk_set_rate_sclk_uart()
397 rk628_i2c_write(rk628, CRU_CLKSEL_CON06, in rk628_cru_clk_set_rate_sclk_uart()
403 rk628_i2c_write(rk628, CRU_CLKSEL_CON20, m << 16 | n); in rk628_cru_clk_set_rate_sclk_uart()
408 void rk628_clk_mux_testout(struct rk628 *rk628, int id) in rk628_clk_mux_testout() argument
412 rk628_i2c_write(rk628, CRU_CLKSEL_CON06, 0x000f0004); in rk628_clk_mux_testout()
415 rk628_i2c_write(rk628, CRU_CLKSEL_CON06, 0x000f0002); in rk628_clk_mux_testout()
418 rk628_i2c_write(rk628, CRU_CLKSEL_CON06, 0x000f000b); in rk628_clk_mux_testout()
424 int rk628_clk_set_rate(struct rk628 *rk628, unsigned int id, in rk628_clk_set_rate() argument
430 rk628_cru_clk_set_rate_pll(rk628, id, rate); in rk628_clk_set_rate()
433 rk628_cru_clk_set_rate_rx_read(rk628, rate); in rk628_clk_set_rate()
436 rk628_cru_clk_set_rate_sclk_vop(rk628, rate); in rk628_clk_set_rate()
439 rk628_cru_clk_set_rate_sclk_uart(rk628, rate); in rk628_clk_set_rate()
442 rk628_cru_clk_set_rate_sclk_hdmirx_aud(rk628, rate); in rk628_clk_set_rate()
452 unsigned long rk628_clk_get_rate(struct rk628 *rk628, unsigned int id) in rk628_clk_get_rate() argument
459 rate = rk628_cru_clk_get_rate_pll(rk628, id); in rk628_clk_get_rate()
462 rate = rk628_cru_clk_get_rate_sclk_vop(rk628); in rk628_clk_get_rate()
465 rate = rk628_cru_clk_get_rate_sclk_hdmirx_aud(rk628); in rk628_clk_get_rate()
524 static int rk628_rgu_update(struct rk628 *rk628, unsigned long id, int assert) in rk628_rgu_update() argument
528 return rk628_i2c_write(rk628, data->reg, in rk628_rgu_update()
532 int rk628_control_assert(struct rk628 *rk628, unsigned long id) in rk628_control_assert() argument
534 return rk628_rgu_update(rk628, id, 1); in rk628_control_assert()
538 int rk628_control_deassert(struct rk628 *rk628, unsigned long id) in rk628_control_deassert() argument
540 return rk628_rgu_update(rk628, id, 0); in rk628_control_deassert()
544 void rk628_cru_initialize(struct rk628 *rk628) in rk628_cru_initialize() argument
549 rk628_i2c_read(rk628, GRF_SYSTEM_STATUS0, &val); in rk628_cru_initialize()
552 dev_info(rk628->dev, "RK628 MCU + I2C Mode\n"); in rk628_cru_initialize()
556 dev_info(rk628->dev, "RK628 I2C Mode Only\n"); in rk628_cru_initialize()
557 rk628_i2c_write(rk628, CRU_GPLL_CON0, 0xffff701d); in rk628_cru_initialize()
559 rk628_i2c_write(rk628, CRU_MODE_CON00, 0xffff0004); in rk628_cru_initialize()
561 rk628_i2c_write(rk628, CRU_CLKSEL_CON00, 0x00ff0080); in rk628_cru_initialize()
562 rk628_i2c_write(rk628, CRU_CLKSEL_CON00, 0x00ff0083); in rk628_cru_initialize()
563 rk628_i2c_write(rk628, CRU_CPLL_CON0, 0xffff3063); in rk628_cru_initialize()
565 rk628_i2c_write(rk628, CRU_MODE_CON00, 0xffff0005); in rk628_cru_initialize()
566 rk628_i2c_write(rk628, CRU_CLKSEL_CON00, 0x00ff0003); in rk628_cru_initialize()
567 rk628_i2c_write(rk628, CRU_CLKSEL_CON00, 0x00ff000b); in rk628_cru_initialize()
568 rk628_i2c_write(rk628, CRU_GPLL_CON0, 0xffff1028); in rk628_cru_initialize()
570 rk628_i2c_write(rk628, CRU_CLKSEL_CON00, 0x00ff008b); in rk628_cru_initialize()
571 rk628_i2c_write(rk628, CRU_CPLL_CON0, 0xffff1063); in rk628_cru_initialize()
573 rk628_i2c_write(rk628, CRU_CLKSEL_CON00, 0x00ff000b); in rk628_cru_initialize()