i2c/rk628/rk628.h

17 #define UPDATE(x, h, l)		(((x) << (l)) & GENMASK((h), (l)))  macro
22 #define SW_VSYNC_POL(x)			UPDATE(x, 26, 26)
24 #define SW_HSYNC_POL(x)			UPDATE(x, 25, 25)
26 #define SW_ADAPTER_I2CSLADR(x)		UPDATE(x, 24, 22)
28 #define SW_EDID_MODE(x)			UPDATE(x, 21, 21)
30 #define SW_I2S_DATA_OEN(x)		UPDATE(x, 10, 10)
34 #define SW_EFUSE_HDCP_EN(x)		UPDATE(x, 8, 8)
36 #define SW_OUTPUT_MODE(x)		UPDATE(x, 7, 3)
38 #define SW_INPUT_MODE(x)		UPDATE(x, 2, 0)
43 #define GRF_GPIO_RX_CEC_SEL(x)		UPDATE(x, 7, 7)
45 #define GRF_GPIO_RXDDC_SDA_SEL(x)	UPDATE(x, 6, 6)
47 #define GRF_GPIO_RXDDC_SCL_SEL(x)	UPDATE(x, 5, 5)
56 #define SCL_V_FACTOR(x)			UPDATE(x, 31, 16)
57 #define SCL_H_FACTOR(x)			UPDATE(x, 15, 0)
59 #define DSP_FRAME_VST(x)		UPDATE(x, 28, 16)
60 #define DSP_FRAME_HST(x)		UPDATE(x, 12, 0)
62 #define DSP_HS_END(x)			UPDATE(x, 23, 16)
63 #define DSP_HTOTAL(x)			UPDATE(x, 12, 0)
65 #define DSP_HACT_ST(x)			UPDATE(x, 28, 16)
66 #define DSP_HACT_END(x)			UPDATE(x, 12, 0)
68 #define DSP_VS_END(x)			UPDATE(x, 23, 16)
69 #define DSP_VTOTAL(x)			UPDATE(x, 12, 0)
71 #define DSP_VACT_ST(x)			UPDATE(x, 28, 16)
72 #define DSP_VACT_END(x)			UPDATE(x, 12, 0)
74 #define DSP_HBOR_ST(x)			UPDATE(x, 28, 16)
75 #define DSP_HBOR_END(x)			UPDATE(x, 12, 0)
77 #define DSP_VBOR_ST(x)			UPDATE(x, 28, 16)
78 #define DSP_VBOR_END(x)			UPDATE(x, 12, 0)
83 #define SW_TXPHY_REFCLK_SEL(x)		UPDATE(x, 6, 5)
85 #define SW_HDMITX_VCLK_PLLREF_SEL(x)	UPDATE(x, 4, 4)
87 #define SW_SPLIT_MODE(x)		UPDATE(x, 1, 1)
108 #define SW_HRES(x)			UPDATE(x, 28, 16)
135 #define FORCETXSTOPMODE(x)		UPDATE(x, 19, 16)
137 #define FORCERXMODE(x)			UPDATE(x, 15, 12)
142 #define PHY_TESTDIN(x)			UPDATE(x, 7, 0)