51 	struct clk		*xvclk;  member
319 	if (!IS_ERR(ov7725->xvclk)) {  in __ov7725_power_on()
320 		ret = clk_prepare_enable(ov7725->xvclk);  in __ov7725_power_on()
322 			dev_err(dev, "Failed to enable xvclk\n");  in __ov7725_power_on()
343 	if (!IS_ERR(ov7725->xvclk))  in __ov7725_power_off()
344 		clk_disable_unprepare(ov7725->xvclk);  in __ov7725_power_off()
502 	ov7725->xvclk = devm_clk_get(dev, "xvclk");  in ov7725_probe()
503 	if (IS_ERR(ov7725->xvclk)) {  in ov7725_probe()
504 		dev_err(dev, "Failed to get xvclk\n");  in ov7725_probe()
507 	ret = clk_set_rate(ov7725->xvclk, ov7725_XVCLK_FREQ);  in ov7725_probe()
509 		dev_err(dev, "Failed to set xvclk rate (24MHz)\n");  in ov7725_probe()
512 	if (clk_get_rate(ov7725->xvclk) != ov7725_XVCLK_FREQ)  in ov7725_probe()
513 		dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");  in ov7725_probe()