Lines Matching refs:g_it66353
58 #define PR_IO(x) { if (g_enable_io_log) dev_dbg(g_it66353->dev, x); }
92 static struct it66353_dev *g_it66353; variable
170 struct it66353_dev *it66353 = g_it66353; in i2c_rd8()
178 struct it66353_dev *it66353 = g_it66353; in it66353_i2c_read()
186 struct it66353_dev *it66353 = g_it66353; in i2c_wr8()
277 struct it66353_dev *it66353 = g_it66353; in it66353_hdmirxsel_show()
280 __func__, g_it66353->hdmi_rx_sel); in it66353_hdmirxsel_show()
282 return sprintf(buf, "%d\n", g_it66353->hdmi_rx_sel); in it66353_hdmirxsel_show()
289 struct it66353_dev *it66353 = g_it66353; in it66353_hdmirxsel_store()
361 g_it66353 = it66353; in it66353_probe()
459 g_it66353->client->addr = (SWAddr >> 1); in it66353_h2swbrd()
460 i2c_rd(g_it66353, offset, rddata, length); in it66353_h2swbrd()
467 g_it66353->client->addr = (SWAddr >> 1); in it66353_h2swbwr()
468 i2c_wr(g_it66353, offset, rddata, length); in it66353_h2swbwr()
480 g_it66353->client->addr = (RXEDIDAddr >> 1); in it66353_h2rxedidwr()
481 i2c_wr(g_it66353, offset, wrdata, length); in it66353_h2rxedidwr()
487 g_it66353->client->addr = (RXEDIDAddr >> 1); in it66353_h2rxedidrd()
488 i2c_wr(g_it66353, offset, wrdata, length); in it66353_h2rxedidrd()
516 g_it66353->client->addr = (RXAddr >> 1); in it66353_h2rxbrd()
517 i2c_rd(g_it66353, offset, rddata, length); in it66353_h2rxbrd()
524 g_it66353->client->addr = (RXAddr >> 1); in it66353_h2rxbwr()
525 i2c_wr(g_it66353, offset, rddata, length); in it66353_h2rxbwr()
533 return cecAddr_updata_bit(g_it66353, offset, 0xFF, wdata); in it66353_cecwr()
553 g_it66353->client->addr = (CecAddr >> 1); in it66353_cecbrd()
554 i2c_rd(g_it66353, offset, rddata, length); in it66353_cecbrd()
561 g_it66353->client->addr = (CecAddr >> 1); in it66353_cecbwr()
562 i2c_wr(g_it66353, offset, rddata, length); in it66353_cecbwr()
593 dev_err(g_it66353->dev, "** TX DDC Bus Sta=%02x\r\n", ddc_status); in _tx_ddcwait()
594 dev_err(g_it66353->dev, "** TX DDC Bus Wait TimeOut => "); in _tx_ddcwait()
597 dev_err(g_it66353->dev, "** DDC Bus Hang\r\n"); in _tx_ddcwait()
602 dev_err(g_it66353->dev, "** DDC NoACK\r\n"); in _tx_ddcwait()
604 dev_err(g_it66353->dev, "** DDC WaitBus\r\n"); in _tx_ddcwait()
606 dev_err(g_it66353->dev, "** DDC ArbiLose\r\n"); in _tx_ddcwait()
608 dev_err(g_it66353->dev, "** UnKnown Issue\r\n"); in _tx_ddcwait()
623 dev_err(g_it66353->dev, "** EnRxDDCBypass:Abort SCDC write\r\n"); in _tx_scdc_write()
628 dev_err(g_it66353->dev, "** HPD-Low:Abort SCDC write\r\n"); in _tx_scdc_write()
657 dev_err(g_it66353->dev, "EnRxDDCBypass:Abort SCDC read\r\n"); in _tx_scdc_read()
662 dev_err(g_it66353->dev, "HPD-Low:Abort SCDC read\r\n"); in _tx_scdc_read()
678 dev_err(g_it66353->dev, "SCDC rd %02x ddcwaitsts = %d\r\n", in _tx_scdc_read()
692 dev_err(g_it66353->dev, "EnRxDDCBypass:Abort HDCP write\r\n"); in _tx_hdcp_write()
697 dev_err(g_it66353->dev, "HPD-Low:Abort HDCP write\r\n"); in _tx_hdcp_write()
723 dev_err(g_it66353->dev, "EnRxDDCBypass:Abort HDCP read\r\n"); in _tx_hdcp_read()
729 dev_err(g_it66353->dev, "HPD-Low:Abort HDCP read\r\n"); in _tx_hdcp_read()
744 dev_err(g_it66353->dev, "SCDC rd %02x ddcwaitsts = %d\r\n", in _tx_hdcp_read()
767 dev_err(g_it66353->dev, "HPD-Low:Abort SCDC read\r\n"); in _tx_scdc_read_ced()
782 dev_err(g_it66353->dev, "SCDC rd ced ddcwaitsts = %d\r\n", ddcwaitsts); in _tx_scdc_read_ced()
1135 dev_err(g_it66353->dev, "ERROR: CAOF fail !!!\r\n"); in it66353_rx_caof_init()
1248 dev_info(g_it66353->dev, "HDCP 2 done\r\n"); in _rx_need_hpd_toggle()
1252 dev_info(g_it66353->dev, "HDCP 1 done\r\n"); in _rx_need_hpd_toggle()
1256 dev_info(g_it66353->dev, "HDCP acc\r\n"); in _rx_need_hpd_toggle()
1261 dev_info(g_it66353->dev, "TXOE timeout 2\r\n"); in _rx_need_hpd_toggle()
1413 dev_info(g_it66353->dev, "Set RxP%d HPD = %d %02x\r\n", in _rx_set_hpd()
1417 dev_err(g_it66353->dev, "Invaild port %d\r\n", port); in _rx_set_hpd()
1468 dev_info(g_it66353->dev, "*** fixed EQ fail\r\n"); in it66353it66353_rx_handle_output_err()
1607 dev_info(g_it66353->dev, "## src SCDC wr %02x\r\n", reg); in _sw_monitor_and_fix_scdc_write()
2076 dev_err(g_it66353->dev, "it66353_get_rx_vclk p=%u\r\n", port); in it66353_get_rx_vclk()
2099 dev_err(g_it66353->dev, "it66353_get_rx_vclk sw_reg20=%02x\r\n", in it66353_get_rx_vclk()
2104 dev_err(g_it66353->dev, in it66353_get_rx_vclk()
2122 dev_err(g_it66353->dev, "TMDSCLKSpeed == 0 p=%u\r\n", port); in it66353_get_rx_vclk()
2130 dev_err(g_it66353->dev, "it66353_get_rx_vclk p=%u\r\n", port); in it66353_get_rx_vclk()
2610 dev_err(g_it66353->dev, "**Wait DDC idle timeout\n"); in it66353_wait_for_ddc_idle()
2632 dev_err(g_it66353->dev, "state_fsm %d, new %d -> %d\r\n", in __it66353_fsm_chg()
2754 dev_dbg(g_it66353->dev, "Clk Ratio = %d\r\n", in __it66353_fsm_chg()
2787 dev_dbg(g_it66353->dev, "Clk Ratio==0, align=0\n"); in __it66353_fsm_chg()
2790 dev_dbg(g_it66353->dev, "Clk Ratio==1, align=%d\n", in __it66353_fsm_chg()
2939 dev_dbg(g_it66353->dev, "#state_fsm %s -> %s (%d)\r\n", in __it66353_fsm_chg2()
2943 dev_err(g_it66353->dev, "#state_fsm %d, new %d -> %d\r\n", in __it66353_fsm_chg2()
2947 dev_dbg(g_it66353->dev, "#state_fsm %d -> %d\r\n", in __it66353_fsm_chg2()
2968 dev_info(g_it66353->dev, "HDMI_MODE=AUTO \r\n"); in it66353_auto_detect_hdmi_encoding()
2977 dev_info(g_it66353->dev, "HDMI_MODE=F20\r\n"); in it66353_force_hdmi20()
2986 dev_info(g_it66353->dev, "HDMI_MODE=F14\r\n"); in it66353_force_hdmi14()
3025 dev_info(g_it66353->dev, "EQ restore2 !\r\n"); in it66353_fsm_EQ_check()
3030 dev_info(g_it66353->dev, "[%d] eq_state=%d\r\n", in it66353_fsm_EQ_check()
3039 dev_info(g_it66353->dev, "EQ done !\r\n"); in it66353_fsm_EQ_check()
3047 dev_info(g_it66353->dev, "EQ give up !\r\n"); in it66353_fsm_EQ_check()
3054 dev_info(g_it66353->dev, "EQ restore !\r\n"); in it66353_fsm_EQ_check()
3058 dev_info(g_it66353->dev, "EQ default !\r\n"); in it66353_fsm_EQ_check()
3060 dev_err(g_it66353->dev, "??eq_state=%d\r\n", eq_state); in it66353_fsm_EQ_check()
3106 dev_err(g_it66353->dev, in it66353_fsm()
3118 dev_err(g_it66353->dev, in it66353_fsm()
3165 dev_err(g_it66353->dev, "RxChk-SymUnlock\r\n"); in it66353_fsm()
3203 dev_err(g_it66353->dev, in it66353_fsm()
3361 dev_info(g_it66353->dev, "---HDCP BD=%02x\r\n", currBD); in it66353_irq()
3455 dev_info(g_it66353->dev, "waiting HPD...\r\n"); in it66353_device_init()
3463 dev_info(g_it66353->dev, "Using internal EDID...\r\n"); in it66353_device_init()
3494 dev_info(g_it66353->dev, "Active port = P%d\r\n", in it66353_device_init()
3576 dev_info(g_it66353->dev, "Find 6635 %02x !! \r\n", in it66353_is_device_ready()
3584 dev_info(g_it66353->dev, "Find 6635x %02x !! \r\n", in it66353_is_device_ready()
3590 dev_info(g_it66353->dev, "Find 6635 fail !!\r\n"); in it66353_is_device_ready()
3626 dev_err(g_it66353->dev, "ERROR: DDC EDID Read Fail !!!\r\n"); in it66353_read_edid()
3634 dev_err(g_it66353->dev, in it66353_read_edid()
3665 dev_err(g_it66353->dev, in it66353_read_one_block_edid()
3704 dev_info(g_it66353->dev, "HDMI2 sink=%d\n", it66353_gdev.vars.is_hdmi20_sink); in it66353_parse_edid_for_vsdb()
3761 dev_info(g_it66353->dev, "Set RX EDID step2...\r\n"); in it66353_setup_edid_ram_step2()
3774 dev_info(g_it66353->dev, "VSDB=%02x\r\n", it66353_gdev.vars.VSDBOffset); in it66353_setup_edid_ram_step2()
3869 dev_err(g_it66353->dev, "ERROR: DDC 0x1B=%02X\r\n", uc); in it66353_ddc_abort()
3890 dev_err(g_it66353->dev, "ERROR: read edid block 0\r\n"); in it66353_update_edid()
3975 dev_err(g_it66353->dev, "Warning: Extblock = %d\r\n", extblock); in it66353_setup_edid_ram()
4066 dev_info(g_it66353->dev, ".rx_opt->tag1=%d\r\n", in it66353_dump_opts()
4068 dev_info(g_it66353->dev, ".rx_opt->EnRxDDCBypass=%d\r\n", in it66353_dump_opts()
4070 dev_info(g_it66353->dev, ".rx_opt->EnRxPWR5VBypass=%d\r\n", in it66353_dump_opts()
4072 dev_info(g_it66353->dev, ".rx_opt->EnRxHPDBypass=%d\r\n", in it66353_dump_opts()
4074 dev_info(g_it66353->dev, ".rx_opt->TryFixedEQFirst=%d\r\n", in it66353_dump_opts()
4076 dev_info(g_it66353->dev, ".rx_opt->EnableAutoEQ=%d\r\n", in it66353_dump_opts()
4078 dev_info(g_it66353->dev, ".rx_opt->NonActivePortReplyHPD=%d\r\n", in it66353_dump_opts()
4080 dev_info(g_it66353->dev, ".rx_opt->DisableEdidRam=%d\r\n", in it66353_dump_opts()
4082 dev_info(g_it66353->dev, ".rx_opt->DefaultEQ=%x %x %x\r\n", in it66353_dump_opts()
4086 dev_info(g_it66353->dev, ".rx_opt->FixIncorrectHdmiEnc=%d\r\n", in it66353_dump_opts()
4088 dev_info(g_it66353->dev, ".rx_opt->HPDOutputInverse=%d\r\n", in it66353_dump_opts()
4090 dev_info(g_it66353->dev, ".rx_opt->HPDTogglePeriod=%d\r\n", in it66353_dump_opts()
4092 dev_info(g_it66353->dev, ".rx_opt->TxOEAlignment=%d\r\n", in it66353_dump_opts()
4094 dev_info(g_it66353->dev, ".rx_opt->str_size=%d\r\n", in it66353_dump_opts()
4097 dev_info(g_it66353->dev, ".tx_opt->tag1=%d\r\n", it66353_gdev.opts.tx_opt->tag1); in it66353_dump_opts()
4098 dev_info(g_it66353->dev, ".tx_opt->EnTxPNSwap=%d\r\n", in it66353_dump_opts()
4100 dev_info(g_it66353->dev, ".tx_opt->EnTxChSwap=%d\r\n", in it66353_dump_opts()
4102 dev_info(g_it66353->dev, ".tx_opt->EnTxVCLKInv=%d\r\n", in it66353_dump_opts()
4104 dev_info(g_it66353->dev, ".tx_opt->EnTxOutD1t=%d\r\n", in it66353_dump_opts()
4106 dev_info(g_it66353->dev, ".tx_opt->CopyEDIDFromSink=%d\r\n", in it66353_dump_opts()
4108 dev_info(g_it66353->dev, ".tx_opt->ParsePhysicalAddr=%d\r\n", in it66353_dump_opts()
4110 dev_info(g_it66353->dev, ".tx_opt->TurnOffTx5VWhenSwitchPort=%d\r\n", in it66353_dump_opts()
4112 dev_info(g_it66353->dev, ".tx_opt->str_size=%d\r\n", in it66353_dump_opts()
4115 dev_info(g_it66353->dev, ".dev_opt->tag1=%d\r\n", in it66353_dump_opts()
4117 dev_info(g_it66353->dev, ".dev_opt->SwAddr=%d\r\n", in it66353_dump_opts()
4119 dev_info(g_it66353->dev, ".dev_opt->RxAddr=%d\r\n", in it66353_dump_opts()
4121 dev_info(g_it66353->dev, ".dev_opt->CecAddr=%d\r\n", in it66353_dump_opts()
4123 dev_info(g_it66353->dev, ".dev_opt->EdidAddr=%d\r\n", in it66353_dump_opts()
4125 dev_info(g_it66353->dev, ".dev_opt->ForceRxOn=%d\r\n", in it66353_dump_opts()
4127 dev_info(g_it66353->dev, ".dev_opt->RxAutoPowerDown=%d\r\n", in it66353_dump_opts()
4129 dev_info(g_it66353->dev, ".dev_opt->DoTxPowerDown=%d\r\n", in it66353_dump_opts()
4131 dev_info(g_it66353->dev, ".dev_opt->TxPowerDownWhileWaitingClock=%d\r\n", in it66353_dump_opts()
4133 dev_info(g_it66353->dev, ".dev_opt->str_size=%d\r\n", in it66353_dump_opts()
4144 dev_info(g_it66353->dev, reg_desc); in it66353_dump_register()
4147 dev_info(g_it66353->dev, " | "); in it66353_dump_register()
4150 dev_info(g_it66353->dev, "- "); in it66353_dump_register()
4152 dev_info(g_it66353->dev, "%02X ", j); in it66353_dump_register()
4154 dev_info(g_it66353->dev, "\n"); in it66353_dump_register()
4158 dev_info(g_it66353->dev, "---"); in it66353_dump_register()
4160 dev_info(g_it66353->dev, "\n"); in it66353_dump_register()
4164 dev_info(g_it66353->dev, "%02X | ", i); in it66353_dump_register()
4168 dev_info(g_it66353->dev, "- "); in it66353_dump_register()
4170 dev_info(g_it66353->dev, "%02x ", regbuf[j]); in it66353_dump_register()
4172 dev_info(g_it66353->dev, "\n"); in it66353_dump_register()
4174 dev_info(g_it66353->dev, "\n"); in it66353_dump_register()
4237 dev_err(g_it66353->dev, "ERROR: DDC EDID Write Fail !!!\r\n"); in it66353_write_edid()
4264 dev_err(g_it66353->dev, in it66353_write_one_block_edid()
4281 dev_err(g_it66353->dev, "Invalid port number:%d\r\n", port); in it66353_is_5v_present()
4295 dev_err(g_it66353->dev, "Invalid port number:%d\r\n", port); in it66353_is_clock_detected()
4311 dev_err(g_it66353->dev, "Invalid port number:%d\r\n", port); in it66353_set_active_port()
4365 dev_info(g_it66353->dev, "==> RS set to %02x %02x %02x\r\n", in it66353_set_RS()
4403 dev_err(g_it66353->dev, "Invalid block %d\r\n", block); in it66353_set_internal_EDID()
4433 dev_err(g_it66353->dev, "Invalid block %d\r\n", block); in it66353_get_internal_EDID()
4437 dev_err(g_it66353->dev, "Invalid port %d\r\n", target_port); in it66353_get_internal_EDID()
4477 dev_err(g_it66353->dev, "Invalid port number:%d\r\n", port); in it66353_change_default_RS()